[mips][msa] Corrected the definition of the dotp_[su].[hwd] intrinsics

The elements of the operands should be half the width of the elements of
the result.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@190505 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/clang/Basic/BuiltinsMips.def b/include/clang/Basic/BuiltinsMips.def
index ea27a5d9ebe54196bae4bf204ed94ed79c153c13..3c3ba96f0d2f90af0836780f185d4e2c64f29bd7 100644 (file)
--- a/include/clang/Basic/BuiltinsMips.def
+++ b/include/clang/Basic/BuiltinsMips.def
@@ -371,13 +371,13 @@ BUILTIN(__builtin_msa_div_u_h, "V8UsV8UsV8Us", "nc")
 BUILTIN(__builtin_msa_div_u_w, "V4UiV4UiV4Ui", "nc")
 BUILTIN(__builtin_msa_div_u_d, "V2ULLiV2ULLiV2ULLi", "nc")
 
-BUILTIN(__builtin_msa_dotp_s_h, "V8SsV8SsV8Ss", "nc")
-BUILTIN(__builtin_msa_dotp_s_w, "V4SiV4SiV4Si", "nc")
-BUILTIN(__builtin_msa_dotp_s_d, "V2SLLiV2SLLiV2SLLi", "nc")
+BUILTIN(__builtin_msa_dotp_s_h, "V8SsV16ScV16Sc", "nc")
+BUILTIN(__builtin_msa_dotp_s_w, "V4SiV8SsV8Ss", "nc")
+BUILTIN(__builtin_msa_dotp_s_d, "V2SLLiV4SiV4Si", "nc")
 
-BUILTIN(__builtin_msa_dotp_u_h, "V8UsV8UsV8Us", "nc")
-BUILTIN(__builtin_msa_dotp_u_w, "V4UiV4UiV4Ui", "nc")
-BUILTIN(__builtin_msa_dotp_u_d, "V2ULLiV2ULLiV2ULLi", "nc")
+BUILTIN(__builtin_msa_dotp_u_h, "V8UsV16UcV16Uc", "nc")
+BUILTIN(__builtin_msa_dotp_u_w, "V4UiV8UsV8Us", "nc")
+BUILTIN(__builtin_msa_dotp_u_d, "V2ULLiV4UiV4Ui", "nc")
 
 BUILTIN(__builtin_msa_dpadd_s_h, "V8SsV8SsV16ScV16Sc", "nc")
 BUILTIN(__builtin_msa_dpadd_s_w, "V4SiV4SiV8SsV8Ss", "nc")

diff --git a/test/CodeGen/builtins-mips-msa.c b/test/CodeGen/builtins-mips-msa.c
index 4118b4a7b0c70f1caaf914518ae8071dcf5bc376..a333f1e9a93c16b0b831782ed481d0bcda34842f 100644 (file)
--- a/test/CodeGen/builtins-mips-msa.c
+++ b/test/CodeGen/builtins-mips-msa.c
@@ -256,13 +256,13 @@ void test(void) {
   v4u32_r = __builtin_msa_div_u_w(v4u32_a, v4u32_b); // CHECK: call <4  x i32> @llvm.mips.div.u.w(
   v2u64_r = __builtin_msa_div_u_d(v2u64_a, v2u64_b); // CHECK: call <2  x i64> @llvm.mips.div.u.d(
 
-  v8i16_r = __builtin_msa_dotp_s_h(v8i16_a, v8i16_b); // CHECK: call <8  x i16> @llvm.mips.dotp.s.h(
-  v4i32_r = __builtin_msa_dotp_s_w(v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.dotp.s.w(
-  v2i64_r = __builtin_msa_dotp_s_d(v2i64_a, v2i64_b); // CHECK: call <2  x i64> @llvm.mips.dotp.s.d(
+  v8i16_r = __builtin_msa_dotp_s_h(v16i8_a, v16i8_b); // CHECK: call <8  x i16> @llvm.mips.dotp.s.h(
+  v4i32_r = __builtin_msa_dotp_s_w(v8i16_a, v8i16_b); // CHECK: call <4  x i32> @llvm.mips.dotp.s.w(
+  v2i64_r = __builtin_msa_dotp_s_d(v4i32_a, v4i32_b); // CHECK: call <2  x i64> @llvm.mips.dotp.s.d(
 
-  v8u16_r = __builtin_msa_dotp_u_h(v8u16_a, v8u16_b); // CHECK: call <8  x i16> @llvm.mips.dotp.u.h(
-  v4u32_r = __builtin_msa_dotp_u_w(v4u32_a, v4u32_b); // CHECK: call <4  x i32> @llvm.mips.dotp.u.w(
-  v2u64_r = __builtin_msa_dotp_u_d(v2u64_a, v2u64_b); // CHECK: call <2  x i64> @llvm.mips.dotp.u.d(
+  v8u16_r = __builtin_msa_dotp_u_h(v16u8_a, v16u8_b); // CHECK: call <8  x i16> @llvm.mips.dotp.u.h(
+  v4u32_r = __builtin_msa_dotp_u_w(v8u16_a, v8u16_b); // CHECK: call <4  x i32> @llvm.mips.dotp.u.w(
+  v2u64_r = __builtin_msa_dotp_u_d(v4u32_a, v4u32_b); // CHECK: call <2  x i64> @llvm.mips.dotp.u.d(
 
   v8i16_r = __builtin_msa_dpadd_s_h(v8i16_r, v16i8_a, v16i8_b); // CHECK: call <8  x i16> @llvm.mips.dpadd.s.h(
   v4i32_r = __builtin_msa_dpadd_s_w(v4i32_r, v8i16_a, v8i16_b); // CHECK: call <4  x i32> @llvm.mips.dpadd.s.w(