= "llvm_targetmachine_features"
external data_layout : t -> DataLayout.t
= "llvm_targetmachine_data_layout"
+ external add_analysis_passes : [< Llvm.PassManager.any ] Llvm.PassManager.t -> t -> unit
+ = "llvm_targetmachine_add_analysis_passes"
external set_verbose_asm : bool -> t -> unit
= "llvm_targetmachine_set_verbose_asm"
external emit_to_file : Llvm.llmodule -> CodeGenFileType.t -> string ->
(** Returns the data layout of this target machine. *)
val data_layout : t -> DataLayout.t
+ (** Adds the target-specific analysis passes to the pass manager.
+ See [llvm::TargetMachine::addAnalysisPasses]. *)
+ val add_analysis_passes : [< Llvm.PassManager.any ] Llvm.PassManager.t -> t -> unit
+
(** Sets the assembly verbosity of this target machine.
See [llvm::TargetMachine::setAsmVerbosity]. *)
val set_verbose_asm : bool -> t -> unit
return Buffer;
}
+
+/* TargetMachine.t -> Llvm.PassManager.t -> unit */
+CAMLprim value llvm_targetmachine_add_analysis_passes(LLVMPassManagerRef PM,
+ value Machine) {
+ LLVMAddAnalysisPasses(TargetMachine_val(Machine), PM);
+ return Val_unit;
+}
assert_equal (TM.cpu machine) "";
assert_equal (TM.features machine) "";
ignore (TM.data_layout machine);
- TM.set_verbose_asm true machine
+ TM.set_verbose_asm true machine;
+ let pm = PassManager.create () in
+ TM.add_analysis_passes pm machine
(*===-- Code Emission -----------------------------------------------------===*)