[X86] Add test case for PR42079. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362197 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/vec_fpext.ll b/test/CodeGen/X86/vec_fpext.ll
index 3007c8d71dc8627e5402bc673ca7989118457752..082a533665785426902662ec9897d01595fbcd9c 100644 (file)
--- a/test/CodeGen/X86/vec_fpext.ll
+++ b/test/CodeGen/X86/vec_fpext.ll
@@ -298,3 +298,48 @@ entry:
   %2  = fpext <2 x float> %1 to <2 x double>
   ret <2 x double> %2
 }
+
+; Make sure we don't narrow a volatile load.
+; FIXME: We incorrectly narrow it for avx512vl.
+define <2 x double> @PR42079(<4 x float>* %x) {
+; X32-SSE-LABEL: PR42079:
+; X32-SSE:       # %bb.0:
+; X32-SSE-NEXT:    movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X32-SSE-NEXT:    movaps (%eax), %xmm0 # encoding: [0x0f,0x28,0x00]
+; X32-SSE-NEXT:    cvtps2pd %xmm0, %xmm0 # encoding: [0x0f,0x5a,0xc0]
+; X32-SSE-NEXT:    retl # encoding: [0xc3]
+;
+; X32-AVX-LABEL: PR42079:
+; X32-AVX:       # %bb.0:
+; X32-AVX-NEXT:    movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X32-AVX-NEXT:    vmovaps (%eax), %xmm0 # encoding: [0xc5,0xf8,0x28,0x00]
+; X32-AVX-NEXT:    vcvtps2pd %xmm0, %xmm0 # encoding: [0xc5,0xf8,0x5a,0xc0]
+; X32-AVX-NEXT:    retl # encoding: [0xc3]
+;
+; X32-AVX512VL-LABEL: PR42079:
+; X32-AVX512VL:       # %bb.0:
+; X32-AVX512VL-NEXT:    movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X32-AVX512VL-NEXT:    vcvtps2pd (%eax), %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x5a,0x00]
+; X32-AVX512VL-NEXT:    retl # encoding: [0xc3]
+;
+; X64-SSE-LABEL: PR42079:
+; X64-SSE:       # %bb.0:
+; X64-SSE-NEXT:    movaps (%rdi), %xmm0 # encoding: [0x0f,0x28,0x07]
+; X64-SSE-NEXT:    cvtps2pd %xmm0, %xmm0 # encoding: [0x0f,0x5a,0xc0]
+; X64-SSE-NEXT:    retq # encoding: [0xc3]
+;
+; X64-AVX-LABEL: PR42079:
+; X64-AVX:       # %bb.0:
+; X64-AVX-NEXT:    vmovaps (%rdi), %xmm0 # encoding: [0xc5,0xf8,0x28,0x07]
+; X64-AVX-NEXT:    vcvtps2pd %xmm0, %xmm0 # encoding: [0xc5,0xf8,0x5a,0xc0]
+; X64-AVX-NEXT:    retq # encoding: [0xc3]
+;
+; X64-AVX512VL-LABEL: PR42079:
+; X64-AVX512VL:       # %bb.0:
+; X64-AVX512VL-NEXT:    vcvtps2pd (%rdi), %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x5a,0x07]
+; X64-AVX512VL-NEXT:    retq # encoding: [0xc3]
+  %a = load volatile <4 x float>, <4 x float>* %x
+  %b = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 0, i32 1>
+  %c = fpext <2 x float> %b to <2 x double>
+  ret <2 x double> %c
+}