//===----------------------------------------------------------------------===//
#include "llvm/Object/ELFObjectFile.h"
+#include "llvm/Support/ARMBuildAttributes.h"
+#include "llvm/Support/ARMAttributeParser.h"
#include "llvm/Support/MathExtras.h"
namespace llvm {
return std::move(R);
}
-SubtargetFeatures ELFObjectFileBase::getFeatures() const {
- switch (getEMachine()) {
- case ELF::EM_MIPS: {
- SubtargetFeatures Features;
- unsigned PlatformFlags;
- getPlatformFlags(PlatformFlags);
+SubtargetFeatures ELFObjectFileBase::getMIPSFeatures() const {
+ SubtargetFeatures Features;
+ unsigned PlatformFlags;
+ getPlatformFlags(PlatformFlags);
+
+ switch (PlatformFlags & ELF::EF_MIPS_ARCH) {
+ case ELF::EF_MIPS_ARCH_1:
+ break;
+ case ELF::EF_MIPS_ARCH_2:
+ Features.AddFeature("mips2");
+ break;
+ case ELF::EF_MIPS_ARCH_3:
+ Features.AddFeature("mips3");
+ break;
+ case ELF::EF_MIPS_ARCH_4:
+ Features.AddFeature("mips4");
+ break;
+ case ELF::EF_MIPS_ARCH_5:
+ Features.AddFeature("mips5");
+ break;
+ case ELF::EF_MIPS_ARCH_32:
+ Features.AddFeature("mips32");
+ break;
+ case ELF::EF_MIPS_ARCH_64:
+ Features.AddFeature("mips64");
+ break;
+ case ELF::EF_MIPS_ARCH_32R2:
+ Features.AddFeature("mips32r2");
+ break;
+ case ELF::EF_MIPS_ARCH_64R2:
+ Features.AddFeature("mips64r2");
+ break;
+ case ELF::EF_MIPS_ARCH_32R6:
+ Features.AddFeature("mips32r6");
+ break;
+ case ELF::EF_MIPS_ARCH_64R6:
+ Features.AddFeature("mips64r6");
+ break;
+ default:
+ llvm_unreachable("Unknown EF_MIPS_ARCH value");
+ }
+
+ switch (PlatformFlags & ELF::EF_MIPS_MACH) {
+ case ELF::EF_MIPS_MACH_NONE:
+ // No feature associated with this value.
+ break;
+ case ELF::EF_MIPS_MACH_OCTEON:
+ Features.AddFeature("cnmips");
+ break;
+ default:
+ llvm_unreachable("Unknown EF_MIPS_ARCH value");
+ }
+
+ if (PlatformFlags & ELF::EF_MIPS_ARCH_ASE_M16)
+ Features.AddFeature("mips16");
+ if (PlatformFlags & ELF::EF_MIPS_MICROMIPS)
+ Features.AddFeature("micromips");
+
+ return Features;
+}
- switch (PlatformFlags & ELF::EF_MIPS_ARCH) {
- case ELF::EF_MIPS_ARCH_1:
+SubtargetFeatures ELFObjectFileBase::getARMFeatures() const {
+ SubtargetFeatures Features;
+ ARMAttributeParser Attributes;
+ std::error_code EC = getBuildAttributes(Attributes);
+ if (EC)
+ return SubtargetFeatures();
+
+ // both ARMv7-M and R have to support thumb hardware div
+ bool isV7 = false;
+ if (Attributes.hasAttribute(ARMBuildAttrs::CPU_arch))
+ isV7 = Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch)
+ == ARMBuildAttrs::v7;
+
+ if (Attributes.hasAttribute(ARMBuildAttrs::CPU_arch_profile)) {
+ switch(Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile)) {
+ case ARMBuildAttrs::ApplicationProfile:
+ Features.AddFeature("aclass");
break;
- case ELF::EF_MIPS_ARCH_2:
- Features.AddFeature("mips2");
+ case ARMBuildAttrs::RealTimeProfile:
+ Features.AddFeature("rclass");
+ if (isV7)
+ Features.AddFeature("hwdiv");
break;
- case ELF::EF_MIPS_ARCH_3:
- Features.AddFeature("mips3");
+ case ARMBuildAttrs::MicroControllerProfile:
+ Features.AddFeature("mclass");
+ if (isV7)
+ Features.AddFeature("hwdiv");
break;
- case ELF::EF_MIPS_ARCH_4:
- Features.AddFeature("mips4");
+ }
+ }
+
+ if (Attributes.hasAttribute(ARMBuildAttrs::THUMB_ISA_use)) {
+ switch(Attributes.getAttributeValue(ARMBuildAttrs::THUMB_ISA_use)) {
+ default:
break;
- case ELF::EF_MIPS_ARCH_5:
- Features.AddFeature("mips5");
+ case ARMBuildAttrs::Not_Allowed:
+ Features.AddFeature("thumb", false);
+ Features.AddFeature("thumb2", false);
break;
- case ELF::EF_MIPS_ARCH_32:
- Features.AddFeature("mips32");
+ case ARMBuildAttrs::AllowThumb32:
+ Features.AddFeature("thumb2");
break;
- case ELF::EF_MIPS_ARCH_64:
- Features.AddFeature("mips64");
+ }
+ }
+
+ if (Attributes.hasAttribute(ARMBuildAttrs::FP_arch)) {
+ switch(Attributes.getAttributeValue(ARMBuildAttrs::FP_arch)) {
+ default:
break;
- case ELF::EF_MIPS_ARCH_32R2:
- Features.AddFeature("mips32r2");
+ case ARMBuildAttrs::Not_Allowed:
+ Features.AddFeature("vfp2", false);
+ Features.AddFeature("vfp3", false);
+ Features.AddFeature("vfp4", false);
break;
- case ELF::EF_MIPS_ARCH_64R2:
- Features.AddFeature("mips64r2");
+ case ARMBuildAttrs::AllowFPv2:
+ Features.AddFeature("vfp2");
break;
- case ELF::EF_MIPS_ARCH_32R6:
- Features.AddFeature("mips32r6");
+ case ARMBuildAttrs::AllowFPv3A:
+ case ARMBuildAttrs::AllowFPv3B:
+ Features.AddFeature("vfp3");
break;
- case ELF::EF_MIPS_ARCH_64R6:
- Features.AddFeature("mips64r6");
+ case ARMBuildAttrs::AllowFPv4A:
+ case ARMBuildAttrs::AllowFPv4B:
+ Features.AddFeature("vfp4");
break;
- default:
- llvm_unreachable("Unknown EF_MIPS_ARCH value");
}
+ }
- switch (PlatformFlags & ELF::EF_MIPS_MACH) {
- case ELF::EF_MIPS_MACH_NONE:
- // No feature associated with this value.
+ if (Attributes.hasAttribute(ARMBuildAttrs::Advanced_SIMD_arch)) {
+ switch(Attributes.getAttributeValue(ARMBuildAttrs::Advanced_SIMD_arch)) {
+ default:
+ break;
+ case ARMBuildAttrs::Not_Allowed:
+ Features.AddFeature("neon", false);
+ Features.AddFeature("fp16", false);
break;
- case ELF::EF_MIPS_MACH_OCTEON:
- Features.AddFeature("cnmips");
+ case ARMBuildAttrs::AllowNeon:
+ Features.AddFeature("neon");
break;
+ case ARMBuildAttrs::AllowNeon2:
+ Features.AddFeature("neon");
+ Features.AddFeature("fp16");
+ break;
+ }
+ }
+
+ if (Attributes.hasAttribute(ARMBuildAttrs::DIV_use)) {
+ switch(Attributes.getAttributeValue(ARMBuildAttrs::DIV_use)) {
default:
- llvm_unreachable("Unknown EF_MIPS_ARCH value");
+ break;
+ case ARMBuildAttrs::DisallowDIV:
+ Features.AddFeature("hwdiv", false);
+ Features.AddFeature("hwdiv-arm", false);
+ break;
+ case ARMBuildAttrs::AllowDIVExt:
+ Features.AddFeature("hwdiv");
+ Features.AddFeature("hwdiv-arm");
+ break;
}
+ }
- if (PlatformFlags & ELF::EF_MIPS_ARCH_ASE_M16)
- Features.AddFeature("mips16");
- if (PlatformFlags & ELF::EF_MIPS_MICROMIPS)
- Features.AddFeature("micromips");
+ return Features;
+}
- return Features;
- }
+SubtargetFeatures ELFObjectFileBase::getFeatures() const {
+ switch (getEMachine()) {
+ case ELF::EM_MIPS:
+ return getMIPSFeatures();
+ case ELF::EM_ARM:
+ return getARMFeatures();
default:
return SubtargetFeatures();
}