[Hexagon] Add inline-asm constraint 'a' for modifier register class

For example
  asm ("memw(%0++%1) = %2" : : "r"(addr),"a"(mod),"r"(val) : "memory")

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@308763 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 01137b66b38527075cdac8a7110dda9c73913eaf..d488ed1dbd77026037803889d9a6899da9711509 100644 (file)
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -6887,6 +6887,9 @@ public:
           return true;
         }
         break;
+      case 'a': // Modifier register m0-m1.
+        Info.setAllowsRegister();
+        return true;
       case 's':
         // Relocatable constant.
         return true;

diff --git a/test/CodeGen/hexagon-inline-asm.c b/test/CodeGen/hexagon-inline-asm.c
index cda3d0dcb6bd3d56eef90cd780251b104c36a670..8d1308ee5d8a52d0c1f38eeebeb24f7042b88d31 100644 (file)
--- a/test/CodeGen/hexagon-inline-asm.c
+++ b/test/CodeGen/hexagon-inline-asm.c
@@ -15,3 +15,9 @@ void foo(v64 v0, v64 v1, v64 *p) {
   asm ("%0 = memw(##%1)" : "=r"(r) : "s"(&g));
 // CHECK: call i32 asm "$0 = memw(##$1)", "=r,s"(i32* @g)
 }
+
+void fred(unsigned *p, unsigned m, unsigned v) {
+  asm ("memw(%0++%1) = %2" : : "r"(p),"a"(m),"r"(v) : "memory");
+// CHECK: call void asm sideeffect "memw($0++$1) = $2", "r,a,r,~{memory}"(i32* %0, i32 %1, i32 %2)
+}
+