Codegen: Fix broken assumption in Tail Merge.

Tail merge was making the assumption that a layout successor or
predecessor was always a cfg successor/predecessor. Remove that
assumption. Changes to tests are necessary because the errant cfg edges
were preventing optimizations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273700 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/BranchFolding.cpp b/lib/CodeGen/BranchFolding.cpp
index 63ffc1fbb8fd2b8353e71f02af038121a5449c06..6eafcca5ddcf2832215694521c00265e685d895f 100644 (file)
--- a/lib/CodeGen/BranchFolding.cpp
+++ b/lib/CodeGen/BranchFolding.cpp
@@ -1255,7 +1255,7 @@ ReoptimizeBlock:
       // where a BB jumps to more than one landing pad.
       // TODO: Is it ever worth rewriting predecessors which don't already
       // jump to a landing pad, and so can safely jump to the fallthrough?
-    } else {
+    } else if (MBB->isSuccessor(&*FallThrough)) {
       // Rewrite all predecessors of the old block to go to the fallthrough
       // instead.
       while (!MBB->pred_empty()) {

diff --git a/test/CodeGen/Mips/eh.ll b/test/CodeGen/Mips/eh.ll
index 19f3d4d23d640dc449877e5480cba47bf8f9d9d9..2f843d9da9a612e317b9980968d70a6fad97fdf4 100644 (file)
--- a/test/CodeGen/Mips/eh.ll
+++ b/test/CodeGen/Mips/eh.ll
@@ -24,7 +24,7 @@ entry:
 
 lpad:                                             ; preds = %entry
 ; CHECK-EL:  # %lpad
-; CHECK-EL:  beq $5
+; CHECK-EL:  bne $5
 
   %exn.val = landingpad { i8*, i32 }
            cleanup

diff --git a/test/CodeGen/SPARC/missinglabel.ll b/test/CodeGen/SPARC/missinglabel.ll
index bcf384b7ad290e41b726b524da143c78acfdd73a..3626feee4c3872554ee7db8d163be47d0fb14a4f 100644 (file)
--- a/test/CodeGen/SPARC/missinglabel.ll
+++ b/test/CodeGen/SPARC/missinglabel.ll
@@ -4,14 +4,14 @@ target triple = "sparc64-unknown-linux-gnu"
 
 define void @f() align 2 {
 entry:
-; CHECK: %xcc, .LBB0_1
+; CHECK: %xcc, .LBB0_2
   %cmp = icmp eq i64 undef, 0
   br i1 %cmp, label %targetblock, label %cond.false
 
 cond.false:
   unreachable
 
-; CHECK: .LBB0_1: ! %targetblock
+; CHECK: .LBB0_2: ! %targetblock
 targetblock:
   br i1 undef, label %cond.false.i83, label %exit.i85
 

diff --git a/test/CodeGen/Thumb2/thumb2-cbnz.ll b/test/CodeGen/Thumb2/thumb2-cbnz.ll
index 8104dc714da065b55b52a482bcfe45a4538d5061..c1a53825e3b10ed8596d0c8682bb12c3ee562941 100644 (file)
--- a/test/CodeGen/Thumb2/thumb2-cbnz.ll
+++ b/test/CodeGen/Thumb2/thumb2-cbnz.ll
@@ -5,6 +5,7 @@ declare double @foo(double) nounwind readnone
 
 define void @t(i32 %c, double %b) {
 entry:
+; CHECK:      cmp      r0, #0
   %cmp1 = icmp ne i32 %c, 0
   br i1 %cmp1, label %bb3, label %bb1
 
@@ -23,8 +24,7 @@ bb7:                                              ; preds = %bb3
   br i1 %cmp3, label %bb11, label %bb9
 
 bb9:                                              ; preds = %bb7
-; CHECK:      cmp      r0, #0
-; CHECK-NEXT:      cbnz
+; CHECK:      cbnz
   %0 = tail call  double @foo(double %b) nounwind readnone ; <double> [#uses=0]
   br label %bb11
 

diff --git a/test/CodeGen/Thumb2/v8_IT_5.ll b/test/CodeGen/Thumb2/v8_IT_5.ll
index 6a7a7a0b0aa05668f3001474dd93e69408317a0d..d8d60413cb0eb16a52b817e925ee418f4bf7cd44 100644 (file)
--- a/test/CodeGen/Thumb2/v8_IT_5.ll
+++ b/test/CodeGen/Thumb2/v8_IT_5.ll
@@ -17,31 +17,13 @@
 
 define i32 @t(i32 %type) optsize {
 entry:
-  br i1 undef, label %if.then, label %if.else
-
-if.then:
-  unreachable
-
-if.else:
-  br i1 undef, label %if.then15, label %if.else18
-
-if.then15:
-  unreachable
-
-if.else18:
   switch i32 %type, label %if.else173 [
-    i32 3, label %if.then115
-    i32 1, label %if.then102
+    i32 13, label %if.then115
+    i32 6, label %if.then102
   ]
 
 if.then102:
-  br i1 undef, label %cond.true10.i, label %t.exit
-
-cond.true10.i:
-  br label %t.exit
-
-t.exit:
-  unreachable
+ br label %if.then115
 
 if.then115:
   br i1 undef, label %if.else163, label %if.else145
@@ -62,4 +44,3 @@ if.else173:
 }
 
 declare hidden fastcc %struct.hc* @foo(%struct.hc* nocapture, i32) nounwind optsize
-

diff --git a/test/CodeGen/X86/br-fold.ll b/test/CodeGen/X86/br-fold.ll
index 5e5f860ffc7655622a24351050acb8af984ebaaf..d3aedbb17e7d2ed6720a1bc7efcec1576379c9b2 100644 (file)
--- a/test/CodeGen/X86/br-fold.ll
+++ b/test/CodeGen/X86/br-fold.ll
@@ -5,9 +5,11 @@
 ; RUN: llc -mtriple=x86_64-scei-ps4 < %s | FileCheck -check-prefix=PS4 %s
 
 ; X64_DARWIN: orq
+; X64_DARWIN-NEXT: jne
 ; X64_DARWIN-NEXT: %bb8.i329
 
 ; X64_LINUX: orq %rax, %rcx
+; X64_LINUX-NEXT: jne
 ; X64_LINUX-NEXT: %bb8.i329
 
 ; X64_WINDOWS: orq %rax, %rcx

diff --git a/test/CodeGen/X86/tail-merge-unreachable.ll b/test/CodeGen/X86/tail-merge-unreachable.ll
new file mode 100644 (file)
index 0000000..7b2c0f7
--- /dev/null
+++ b/test/CodeGen/X86/tail-merge-unreachable.ll
@@ -0,0 +1,34 @@
+; RUN: llc -mtriple=x86_64-linux-gnu %s -o - -verify-machineinstrs | FileCheck %s
+
+define i32 @tail_merge_unreachable(i32 %i) {
+entry:
+  br i1 undef, label %sw, label %end
+sw:
+  switch i32 %i, label %end [
+    i32 99,  label %sw.bb
+    i32 98,  label %sw.bb
+    i32 101, label %sw.bb
+    i32 97,  label %sw.bb2
+    i32 96,  label %sw.bb2
+    i32 100, label %sw.bb2
+  ]
+sw.bb:
+  unreachable
+sw.bb2:
+  unreachable
+end:
+  %p = phi i32 [ 1, %sw ], [ 0, %entry ]
+  ret i32 %p
+
+; CHECK-LABEL: tail_merge_unreachable:
+; Range Check
+; CHECK: addl $-96
+; CHECK: cmpl $5
+; CHECK: jbe [[JUMP_TABLE_BLOCK:[.][A-Za-z0-9_]+]]
+; CHECK: retq
+; CHECK: [[JUMP_TABLE_BLOCK]]:
+; CHECK: btl
+; CHECK: jae [[UNREACHABLE_BLOCK:[.][A-Za-z0-9_]+]]
+; CHECK [[UNREACHABLE_BLOCK]]:
+; CHECK: .Lfunc_end0
+}