Reject ext-inter compound modes based on modelled RD.

Reject ext-inter compound modes before doing full rate distortion
evaluation, if the corresponding single reference modes had a lower
modelled RD.

ext-inter speedup up to TBD.

Coding performance: TBD

Change-Id: I358bfb879c5ebe5e7afbf6f540cc784f8de14857

diff --git a/vp10/common/blockd.h b/vp10/common/blockd.h
index 59c8f9c52d70716e7d61efa80cf309ae2feba90b..0f0b940aba800880f4fa713deb7819565fd94dd4 100644 (file)
--- a/vp10/common/blockd.h
+++ b/vp10/common/blockd.h
@@ -70,6 +70,70 @@ static INLINE int is_inter_compound_mode(PREDICTION_MODE mode) {
   return mode >= NEAREST_NEARESTMV && mode <= NEW_NEWMV;
 }
 
+static INLINE PREDICTION_MODE compound_ref0_mode(PREDICTION_MODE mode) {
+  static PREDICTION_MODE lut[MB_MODE_COUNT] = {
+    MB_MODE_COUNT,  // DC_PRED            0
+    MB_MODE_COUNT,  // V_PRED             1
+    MB_MODE_COUNT,  // H_PRED             2
+    MB_MODE_COUNT,  // D45_PRED           3
+    MB_MODE_COUNT,  // D135_PRED          4
+    MB_MODE_COUNT,  // D117_PRED          5
+    MB_MODE_COUNT,  // D153_PRED          6
+    MB_MODE_COUNT,  // D207_PRED          7
+    MB_MODE_COUNT,  // D63_PRED           8
+    MB_MODE_COUNT,  // TM_PRED            9
+    MB_MODE_COUNT,  // NEARESTMV         10
+    MB_MODE_COUNT,  // NEARMV            11
+    MB_MODE_COUNT,  // ZEROMV            12
+    MB_MODE_COUNT,  // NEWMV             13
+    MB_MODE_COUNT,  // NEWFROMNEARMV     14
+    NEARESTMV,      // NEAREST_NEARESTMV 15
+    NEARESTMV,      // NEAREST_NEARMV    16
+    NEARMV,         // NEAR_NEARESTMV    17
+    NEARMV,         // NEAR_NEARMV       18
+    NEARESTMV,      // NEAREST_NEWMV     19
+    NEWMV,          // NEW_NEARESTMV     20
+    NEARMV,         // NEAR_NEWMV        21
+    NEWMV,          // NEW_NEARMV        22
+    ZEROMV,         // ZERO_ZEROMV       23
+    NEWMV,          // NEW_NEWMV         24
+  };
+  assert(is_inter_compound_mode(mode));
+  return lut[mode];
+}
+
+static INLINE PREDICTION_MODE compound_ref1_mode(PREDICTION_MODE mode) {
+  static PREDICTION_MODE lut[MB_MODE_COUNT] = {
+    MB_MODE_COUNT,  // DC_PRED            0
+    MB_MODE_COUNT,  // V_PRED             1
+    MB_MODE_COUNT,  // H_PRED             2
+    MB_MODE_COUNT,  // D45_PRED           3
+    MB_MODE_COUNT,  // D135_PRED          4
+    MB_MODE_COUNT,  // D117_PRED          5
+    MB_MODE_COUNT,  // D153_PRED          6
+    MB_MODE_COUNT,  // D207_PRED          7
+    MB_MODE_COUNT,  // D63_PRED           8
+    MB_MODE_COUNT,  // TM_PRED            9
+    MB_MODE_COUNT,  // NEARESTMV         10
+    MB_MODE_COUNT,  // NEARMV            11
+    MB_MODE_COUNT,  // ZEROMV            12
+    MB_MODE_COUNT,  // NEWMV             13
+    MB_MODE_COUNT,  // NEWFROMNEARMV     14
+    NEARESTMV,      // NEAREST_NEARESTMV 15
+    NEARMV,         // NEAREST_NEARMV    16
+    NEARESTMV,      // NEAR_NEARESTMV    17
+    NEARMV,         // NEAR_NEARMV       18
+    NEWMV,          // NEAREST_NEWMV     19
+    NEARESTMV,      // NEW_NEARESTMV     20
+    NEWMV,          // NEAR_NEWMV        21
+    NEARMV,         // NEW_NEARMV        22
+    ZEROMV,         // ZERO_ZEROMV       23
+    NEWMV,          // NEW_NEWMV         24
+  };
+  assert(is_inter_compound_mode(mode));
+  return lut[mode];
+}
+
 static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
   return (mode == NEWMV || mode == NEWFROMNEARMV ||
           mode == NEW_NEWMV ||

diff --git a/vp10/encoder/rdopt.c b/vp10/encoder/rdopt.c
index e0c79bce3424154a69e4eb5e0307975e1c06b243..c6f555c30a747541c1cd338cbd0e4bedeaa2bc7c 100644 (file)
--- a/vp10/encoder/rdopt.c
+++ b/vp10/encoder/rdopt.c
@@ -6885,6 +6885,7 @@ static int64_t handle_inter_mode(VP10_COMP *cpi, MACROBLOCK *x,
                                  int single_newmvs_rate[2][MAX_REF_FRAMES],
                                  int *compmode_interintra_cost,
                                  int *compmode_wedge_cost,
+                                 int64_t (*const modelled_rd)[MAX_REF_FRAMES],
 #else
                                  int_mv single_newmv[MAX_REF_FRAMES],
 #endif  // CONFIG_EXT_INTER
@@ -7818,6 +7819,23 @@ static int64_t handle_inter_mode(VP10_COMP *cpi, MACROBLOCK *x,
         memset(skip_txfm, SKIP_TXFM_AC_DC, sizeof(skip_txfm));
 #endif  // CONFIG_EXT_INTER
 
+#if CONFIG_EXT_INTER
+  if (modelled_rd != NULL) {
+    if (is_comp_pred) {
+      const int mode0 = compound_ref0_mode(this_mode);
+      const int mode1 = compound_ref1_mode(this_mode);
+      int64_t mrd = VPXMIN(modelled_rd[mode0][refs[0]],
+                           modelled_rd[mode1][refs[1]]);
+      if (rd / 4 * 3 > mrd && ref_best_rd < INT64_MAX) {
+        restore_dst_buf(xd, orig_dst, orig_dst_stride);
+        return INT64_MAX;
+      }
+    } else if (!is_comp_interintra_pred) {
+      modelled_rd[this_mode][refs[0]] = rd;
+    }
+  }
+#endif  // CONFIG_EXT_INTER
+
   if (cpi->sf.use_rd_breakout && ref_best_rd < INT64_MAX) {
     // if current pred_error modeled rd is substantially more than the best
     // so far, do not bother doing full rd
@@ -8557,6 +8575,7 @@ void vp10_rd_pick_inter_mode_sb(VP10_COMP *cpi,
 #if CONFIG_EXT_INTER
   int_mv single_newmvs[2][MAX_REF_FRAMES] = { { { 0 } },  { { 0 } } };
   int single_newmvs_rate[2][MAX_REF_FRAMES] = { { 0 }, { 0 } };
+  int64_t modelled_rd[MB_MODE_COUNT][MAX_REF_FRAMES];
 #else
   int_mv single_newmv[MAX_REF_FRAMES] = { { 0 } };
 #endif  // CONFIG_EXT_INTER
@@ -8877,6 +8896,12 @@ void vp10_rd_pick_inter_mode_sb(VP10_COMP *cpi,
   else
     x->use_default_inter_tx_type = 0;
 
+#if CONFIG_EXT_INTER
+  for (i = 0 ; i < MB_MODE_COUNT ; ++i)
+    for (ref_frame = 0; ref_frame < MAX_REF_FRAMES; ++ref_frame)
+      modelled_rd[i][ref_frame] = INT64_MAX;
+#endif  // CONFIG_EXT_INTER
+
   for (midx = 0; midx < MAX_MODES; ++midx) {
     int mode_index;
     int mode_excluded = 0;
@@ -9324,6 +9349,7 @@ void vp10_rd_pick_inter_mode_sb(VP10_COMP *cpi,
                                   single_newmvs_rate,
                                   &compmode_interintra_cost,
                                   &compmode_wedge_cost,
+                                  modelled_rd,
 #else
                                   single_newmv,
 #endif  // CONFIG_EXT_INTER
@@ -9438,6 +9464,7 @@ void vp10_rd_pick_inter_mode_sb(VP10_COMP *cpi,
                                            dummy_single_newmvs_rate,
                                            &dummy_compmode_interintra_cost,
                                            &dummy_compmode_wedge_cost,
+                                           NULL,
 #else
                                            dummy_single_newmv,
 #endif