]> granicus.if.org Git - esp-idf/commitdiff
esp32_gdbstub: fix build error with esp32-2019r1 toolchain
authorMahavir Jain <mahavir@espressif.com>
Wed, 7 Aug 2019 06:19:55 +0000 (11:49 +0530)
committerMahavir Jain <mahavir@espressif.com>
Wed, 7 Aug 2019 06:26:13 +0000 (11:56 +0530)
Fixes https://github.com/espressif/esp-idf/issues/3866

components/esp32/panic.c
components/esp_gdbstub/src/gdbstub.c

index 4a104f0290042cfe1d3c7ed2f8462b2c2ceceebf..9b569386238f42349ff85b3777c729303c708bb0 100644 (file)
@@ -429,6 +429,7 @@ static inline void disableAllWdts(void)
     TIMERG1.wdt_wprotect = 0;
 }
 
+#if CONFIG_ESP32_PANIC_PRINT_REBOOT || CONFIG_ESP32_PANIC_SILENT_REBOOT
 static void esp_panic_dig_reset(void) __attribute__((noreturn));
 
 static void esp_panic_dig_reset(void)
@@ -444,6 +445,7 @@ static void esp_panic_dig_reset(void)
         ;
     }
 }
+#endif
 
 static void putEntry(uint32_t pc, uint32_t sp)
 {
index fbb3d26bf177c20ec8df64464a1fbe5ffdd3e34f..f15be617f2dc243b226886e53e155560d3144514 100644 (file)
@@ -205,12 +205,14 @@ static void handle_H_command(const unsigned char* cmd, int len)
         } else if (requested_task_index > s_scratch.task_count) {
             ret = "E00";
         } else {
-            TaskHandle_t handle;
+            TaskHandle_t handle = NULL;
             get_task_handle(requested_task_index, &handle);
             /* FIXME: for the task currently running on the other CPU, extracting the registers from TCB
              * isn't valid. Need to use some IPC mechanism to obtain the registers of the other CPU
              */
-            esp_gdbstub_tcb_to_regfile(handle, &s_scratch.regfile);
+            if (handle != NULL) {
+                esp_gdbstub_tcb_to_regfile(handle, &s_scratch.regfile);
+            }
         }
         esp_gdbstub_send_str_packet(ret);
     } else {