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We reserve 4KB Slow RTC memory to save RF calibation result and BT NVS data.
If not all these Slow RTC momory Blocks are used, we will open the other parts.

diff --git a/components/esp32/include/rom/rtc.h b/components/esp32/include/rom/rtc.h
index 9577119f5cffceb93ada50cf43ff4eee8eeb842b..1ff7f033b961b89d73a455e12b7ff4a6bb4ff169 100644 (file)
--- a/components/esp32/include/rom/rtc.h
+++ b/components/esp32/include/rom/rtc.h
@@ -44,8 +44,8 @@ extern "C" {
   *************************************************************************************
   *     rtc memory addr         type    size            usage
   *     0x3ff61000(0x50000000)  Slow    SIZE_CP         Co-Processor code/Reset Entry
-  *     0x3ff61000+SIZE_CP      Slow    6144-SIZE_CP
-  *     0x3ff62800              Slow    2048            Reserved
+  *     0x3ff61000+SIZE_CP      Slow    4096-SIZE_CP
+  *     0x3ff62800              Slow    4096            Reserved
   *
   *     0x3ff80000(0x400c0000)  Fast    8192            deep sleep entry code
   *

diff --git a/components/esp32/ld/esp32.ld b/components/esp32/ld/esp32.ld
index 7ecfd19e54cb128aee04d197d504921b000a3331..d6b0ac42d175d0541ae1cd8e7ea2badc805ddf8b 100644 (file)
--- a/components/esp32/ld/esp32.ld
+++ b/components/esp32/ld/esp32.ld
@@ -48,7 +48,7 @@ MEMORY
      Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
   */
   rtc_slow_seg(RW)  :                org = 0x50000000 + CONFIG_ULP_COPROC_RESERVE_MEM,
-                                     len = 0x2000 - CONFIG_ULP_COPROC_RESERVE_MEM
+                                     len = 0x1000 - CONFIG_ULP_COPROC_RESERVE_MEM
 }
 
 /* Heap ends at top of dram0_0_seg */