llvm::Value *Arg = EmitAsmInput(S, Info, InputExpr, Constraints);
+ // If this input argument is tied to a larger output result, extend the
+ // input to be the same size as the output. The LLVM backend wants to see
+ // the input and output of a matching constraint be the same size. Note
+ // that GCC does not define what the top bits are here. We use zext because
+ // that is usually cheaper, but LLVM IR should really get an anyext someday.
+ if (Info.hasTiedOperand()) {
+ unsigned Output = Info.getTiedOperand();
+ QualType OutputTy = S.getOutputExpr(Output)->getType();
+ QualType InputTy = InputExpr->getType();
+
+ if (getContext().getTypeSize(OutputTy) >
+ getContext().getTypeSize(InputTy)) {
+ // Use ptrtoint as appropriate so that we can do our extension.
+ if (isa<llvm::PointerType>(Arg->getType()))
+ Arg = Builder.CreatePtrToInt(Arg,
+ llvm::IntegerType::get(LLVMPointerWidth));
+ unsigned OutputSize = (unsigned)getContext().getTypeSize(OutputTy);
+ Arg = Builder.CreateZExt(Arg, llvm::IntegerType::get(OutputSize));
+ }
+ }
+
+
ArgTypes.push_back(Arg->getType());
Args.push_back(Arg);
Constraints += InputConstraint;
-// RUN: clang-cc -emit-llvm %s -o %t -arch=i386 &&
+c// RUN: clang-cc -emit-llvm %s -o %t -arch=i386 &&
void t1(int len) {
__asm__ volatile("" : "=&r"(len), "+&r"(len));
}
void t10(int r) {
__asm__("PR3908 %[lf] %[xx] %[li] %[r]" : [r] "+r" (r) : [lf] "mx" (0), [li] "mr" (0), [xx] "x" ((double)(0)));
}
+
+
+// PR3373
+unsigned t11(signed char input) {
+ unsigned output;
+ __asm__("xyz"
+ : "=a" (output)
+ : "0" (input));
+ return output;
+}