AMDGPUCodeGen: Fix warnings in r303111. [-Wunused-variable]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303137 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp b/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
index ab8b137aa1b3a448e91347c16776d0b5ec6bbe76..6d2785ba1c60dd544fb82e48abc3c1e01e9627d8 100644 (file)
--- a/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
+++ b/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
@@ -136,9 +136,11 @@ void PHILinearize::phiInfoElementAddSource(PHIInfoElementT *Info,
   // sources, because we cannot have different registers with
   // identical predecessors, but we can have the same register for
   // multiple predecessors.
+#if !defined(NDEBUG)
   for (auto SI : phiInfoElementGetSources(Info)) {
     assert((SI.second != SourceMBB || SourceReg == SI.first));
   }
+#endif
 
   phiInfoElementGetSources(Info).insert(PHISourceT(SourceReg, SourceMBB));
 }

diff --git a/lib/Target/AMDGPU/SIInstrInfo.cpp b/lib/Target/AMDGPU/SIInstrInfo.cpp
index c87b04256f8ddf33d37a3f94495bb6713eb7ad20..065fd09eb356b14c6f6c9d4d0d8dcc6cbfe8b967 100644 (file)
--- a/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -564,8 +564,8 @@ void SIInstrInfo::insertVectorSelect(MachineBasicBlock &MBB,
                                      unsigned TrueReg,
                                      unsigned FalseReg) const {
   MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-  const TargetRegisterClass *RegClass = MRI.getRegClass(DstReg);
-  assert(RegClass == &AMDGPU::VGPR_32RegClass && "Not a VGPR32 reg");
+  assert(MRI.getRegClass(DstReg) == &AMDGPU::VGPR_32RegClass &&
+         "Not a VGPR32 reg");
 
   if (Cond.size() == 1) {
     BuildMI(MBB, I, DL, get(AMDGPU::V_CNDMASK_B32_e64), DstReg)