Add the necessary definitions for RISC-V ELF files, including relocs. Also
make necessary trivial change to ELFYaml, llvm-objdump, and llvm-readobj in
order to work with RISC-V ELFs.
Differential Revision: https://reviews.llvm.org/D23557
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285708
91177308-0d34-0410-b5e6-
96231b3b80d8
return "ELF32-mips";
case ELF::EM_PPC:
return "ELF32-ppc";
+ case ELF::EM_RISCV:
+ return "ELF32-riscv";
case ELF::EM_SPARC:
case ELF::EM_SPARC32PLUS:
return "ELF32-sparc";
return (IsLittleEndian ? "ELF64-aarch64-little" : "ELF64-aarch64-big");
case ELF::EM_PPC64:
return "ELF64-ppc64";
+ case ELF::EM_RISCV:
+ return "ELF64-riscv";
case ELF::EM_S390:
return "ELF64-s390";
case ELF::EM_SPARCV9:
return Triple::ppc;
case ELF::EM_PPC64:
return IsLittleEndian ? Triple::ppc64le : Triple::ppc64;
+ case ELF::EM_RISCV:
+ switch (EF.getHeader()->e_ident[ELF::EI_CLASS]) {
+ case ELF::ELFCLASS32:
+ return Triple::riscv32;
+ case ELF::ELFCLASS64:
+ return Triple::riscv64;
+ default:
+ report_fatal_error("Invalid ELFCLASS!");
+ }
case ELF::EM_S390:
return Triple::systemz;
EM_NORC = 218, // Nanoradio Optimized RISC
EM_CSR_KALIMBA = 219, // CSR Kalimba architecture family
EM_AMDGPU = 224, // AMD GPU architecture
+ EM_RISCV = 243, // RISC-V
EM_LANAI = 244, // Lanai 32-bit processor
EM_BPF = 247, // Linux kernel bpf virtual machine
#include "ELFRelocs/Lanai.def"
};
+// ELF Relocation types for RISC-V
+enum {
+#include "ELFRelocs/RISCV.def"
+};
+
// ELF Relocation types for S390/zSeries
enum {
#include "ELFRelocs/SystemZ.def"
break;
}
break;
+ case ELF::EM_RISCV:
+ switch (Type) {
+#include "llvm/Support/ELFRelocs/RISCV.def"
+ default:
+ break;
+ }
+ break;
case ELF::EM_S390:
switch (Type) {
#include "llvm/Support/ELFRelocs/SystemZ.def"
ECase(EM_78KOR)
ECase(EM_56800EX)
ECase(EM_AMDGPU)
+ ECase(EM_RISCV)
ECase(EM_LANAI)
ECase(EM_BPF)
#undef ECase
case ELF::EM_ARM:
#include "llvm/Support/ELFRelocs/ARM.def"
break;
+ case ELF::EM_RISCV:
+#include "llvm/Support/ELFRelocs/RISCV.def"
+ break;
case ELF::EM_LANAI:
#include "llvm/Support/ELFRelocs/Lanai.def"
break;
case ELF::EM_HEXAGON:
case ELF::EM_MIPS:
case ELF::EM_BPF:
+ case ELF::EM_RISCV:
res = Target;
break;
case ELF::EM_WEBASSEMBLY:
ENUM_ENT(EM_78KOR, "EM_78KOR"),
ENUM_ENT(EM_56800EX, "EM_56800EX"),
ENUM_ENT(EM_AMDGPU, "EM_AMDGPU"),
+ ENUM_ENT(EM_RISCV, "RISC-V"),
ENUM_ENT(EM_WEBASSEMBLY, "EM_WEBASSEMBLY"),
ENUM_ENT(EM_LANAI, "EM_LANAI"),
ENUM_ENT(EM_BPF, "EM_BPF"),