TLI.setShouldSignExtI32Param(ShouldSignExtI32Param);
if (T.getArch() == Triple::r600 ||
- T.getArch() == Triple::amdgcn) {
- TLI.setUnavailable(LibFunc_ldexp);
- TLI.setUnavailable(LibFunc_ldexpf);
- TLI.setUnavailable(LibFunc_ldexpl);
- TLI.setUnavailable(LibFunc_exp10);
- TLI.setUnavailable(LibFunc_exp10f);
- TLI.setUnavailable(LibFunc_exp10l);
- TLI.setUnavailable(LibFunc_log10);
- TLI.setUnavailable(LibFunc_log10f);
- TLI.setUnavailable(LibFunc_log10l);
- TLI.setUnavailable(LibFunc_printf);
- }
+ T.getArch() == Triple::amdgcn)
+ TLI.disableAllFunctions();
// There are no library implementations of memcpy and memset for AMD gpus and
// these can be difficult to lower in the backend.
--- /dev/null
+; RUN: opt -mtriple=amdgcn--amdpal -S -instcombine <%s | FileCheck --check-prefixes=GCN %s
+
+; Check that sin/cos is not folded to tan on amdgcn.
+
+; GCN-LABEL: define amdgpu_ps float @llpc.shader.FS.main
+; GCN: call float @llvm.sin.f32
+; GCN: call float @llvm.cos.f32
+
+declare float @llvm.sin.f32(float) #0
+declare float @llvm.cos.f32(float) #0
+
+define amdgpu_ps float @llpc.shader.FS.main(float %arg) {
+.entry:
+ %tmp32 = call float @llvm.sin.f32(float %arg)
+ %tmp33 = call float @llvm.cos.f32(float %arg)
+ %tmp34 = fdiv reassoc nnan nsz arcp contract float 1.000000e+00, %tmp33
+ %tmp35 = fmul reassoc nnan nsz arcp contract float %tmp32, %tmp34
+ ret float %tmp35
+}
+
+attributes #0 = { nounwind readnone speculatable willreturn }