]> granicus.if.org Git - llvm/commitdiff
[X86] Remove lines that set v8f32 FP_ROUND/FP_EXTEND to Legal under AVX512. NFCI
authorCraig Topper <craig.topper@intel.com>
Mon, 27 Nov 2017 22:01:17 +0000 (22:01 +0000)
committerCraig Topper <craig.topper@intel.com>
Mon, 27 Nov 2017 22:01:17 +0000 (22:01 +0000)
We don't do this for narrow vectors under AVX or SSE features. We also don't set them to Expand like we do for many vectors op. Nor does TargetLoweringBase.cpp. This leads me to believe these default to Legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319103 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

index 36e8388127018e44e9d3cabb2b38c5874f859264..4580466f0902c05ede2bca99b857b8cc6a3f5c15 100644 (file)
@@ -1202,8 +1202,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
     setOperationAction(ISD::UINT_TO_FP,         MVT::v4i1,  Custom);
     setOperationAction(ISD::SINT_TO_FP,         MVT::v2i1,  Custom);
     setOperationAction(ISD::UINT_TO_FP,         MVT::v2i1,  Custom);
-    setOperationAction(ISD::FP_ROUND,           MVT::v8f32, Legal);
-    setOperationAction(ISD::FP_EXTEND,          MVT::v8f32, Legal);
 
     setTruncStoreAction(MVT::v8i64,   MVT::v8i8,   Legal);
     setTruncStoreAction(MVT::v8i64,   MVT::v8i16,  Legal);