Improves the accuracy of benchmarks, especially in short functions.
To quote the Intel 64 and IA-32 Architectures Software Developer's Manual:
"The RDTSC instruction is not a serializing instruction. It does not necessarily
wait until all previous instructions have been executed before reading the counter.
Similarly, subsequent instructions may begin execution before the read operation
is performed. If software requires RDTSC to be executed only after all previous
instructions have completed locally, it can either use RDTSCP (if the processor
supports that instruction) or execute the sequence LFENCE;RDTSC."
RDTSCP would accomplish the same task, but it's only available since Nehalem.
This change makes SSE2 a requirement to run checkasm.
{
uint32_t a = 0;
#if HAVE_X86_INLINE_ASM
- asm volatile( "rdtsc" : "=a"(a) :: "edx", "memory" );
+ asm volatile( "lfence \n"
+ "rdtsc \n"
+ : "=a"(a) :: "edx", "memory" );
#elif ARCH_PPC
asm volatile( "mftb %0" : "=r"(a) :: "memory" );
#elif ARCH_ARM // ARMv7 only