]> granicus.if.org Git - llvm/commitdiff
[GISel]: Fix trivial build breakage
authorAditya Nandakumar <aditya_nandakumar@apple.com>
Tue, 6 Aug 2019 17:53:04 +0000 (17:53 +0000)
committerAditya Nandakumar <aditya_nandakumar@apple.com>
Tue, 6 Aug 2019 17:53:04 +0000 (17:53 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@368067 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/CodeGen/GlobalISel/GISelKnownBits.h
lib/CodeGen/GlobalISel/GISelKnownBits.cpp
test/CodeGen/AArch64/O0-pipeline.ll

index d2d4595d5f7c06aa6ae2c01735fb7b1be0c66a45..d546c39447c339fc14b21d28f1f22e1760b9e3c3 100644 (file)
@@ -66,7 +66,7 @@ public:
   void changedInstr(MachineInstr &MI) override{};
 
 protected:
-  constexpr unsigned getMaxDepth() const { return 6; }
+  unsigned getMaxDepth() const { return 6; }
 };
 
 /// To use KnownBitsInfo analysis in a pass,
index bf316cb5dcf854709266aee2d23d587cd0bf6c77..12e69f8a7883ea880d27c2ae75274c92c4443838 100644 (file)
@@ -260,7 +260,7 @@ void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known,
                          Depth + 1);
     if (!RHSKnown.isConstant()) {
       LLVM_DEBUG(
-          MachineInstr *RHSMI = MRI->getVRegDef(MI.getOperand(2).getReg());
+          MachineInstr *RHSMI = MRI.getVRegDef(MI.getOperand(2).getReg());
           dbgs() << '[' << Depth << "] Shift not known constant: " << *RHSMI);
       break;
     }
index e8f831f6151e2c93cfc24421d94edcc8f9400e2e..38af1810feb71013be7f4d1bbf20f7a1e84bcbb3 100644 (file)
@@ -35,6 +35,7 @@
 ; CHECK-NEXT:       Module Verifier
 ; CHECK-NEXT:       Analysis containing CSE Info
 ; CHECK-NEXT:       IRTranslator
+; CHECK-NEXT:       Analysis for ComputingKnownBits
 ; CHECK-NEXT:       AArch64PreLegalizerCombiner
 ; CHECK-NEXT:       Analysis containing CSE Info
 ; CHECK-NEXT:       Legalizer