AMDGPU: Fix counting si_mask_branch as 4 bytes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285202 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AMDGPU/SIInstrInfo.cpp b/lib/Target/AMDGPU/SIInstrInfo.cpp
index fffdeb4b5e08645b062e69bc10c6f87b18fe2139..a7de513dc9a150245e4148a911342d69afe18339 100644 (file)
--- a/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -3504,6 +3504,7 @@ unsigned SIInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
   }
 
   switch (Opc) {
+  case AMDGPU::SI_MASK_BRANCH:
   case TargetOpcode::IMPLICIT_DEF:
   case TargetOpcode::KILL:
   case TargetOpcode::DBG_VALUE:

diff --git a/lib/Target/AMDGPU/SIInstructions.td b/lib/Target/AMDGPU/SIInstructions.td
index 3e39f86bd203ccc67cd327def6bd9ff8d13d8e9b..f3ccee288fd84055a3806922a5cda498360cc759 100644 (file)
--- a/lib/Target/AMDGPU/SIInstructions.td
+++ b/lib/Target/AMDGPU/SIInstructions.td
@@ -147,7 +147,6 @@ def SI_MASK_BRANCH : PseudoInstSI <
   let isBranch = 0;
   let isTerminator = 1;
   let isBarrier = 0;
-  let SALU = 1;
   let Uses = [EXEC];
   let SchedRW = [];
   let hasNoSchedulingInfo = 1;