// The inner check covers all cases but is more expensive.
uint64_t Used = allOnes(Op.getValueSizeInBits());
if (Used != (AndMask | InsertMask)) {
- KnownBits Known;
- CurDAG->computeKnownBits(Op.getOperand(0), Known);
+ KnownBits Known = CurDAG->computeKnownBits(Op.getOperand(0));
if (Used != (AndMask | InsertMask | Known.Zero.getZExtValue()))
return false;
}
// If some bits of Input are already known zeros, those bits will have
// been removed from the mask. See if adding them back in makes the
// mask suitable.
- KnownBits Known;
- CurDAG->computeKnownBits(Input, Known);
+ KnownBits Known = CurDAG->computeKnownBits(Input);
Mask |= Known.Zero.getZExtValue();
if (!refineRxSBGMask(RxSBG, Mask))
return false;
// If some bits of Input are already known ones, those bits will have
// been removed from the mask. See if adding them back in makes the
// mask suitable.
- KnownBits Known;
- CurDAG->computeKnownBits(Input, Known);
+ KnownBits Known = CurDAG->computeKnownBits(Input);
Mask &= ~Known.One.getZExtValue();
if (!refineRxSBGMask(RxSBG, Mask))
return false;
auto *Mask = dyn_cast<ConstantSDNode>(C.Op0.getOperand(1));
if (!Mask)
return;
- KnownBits Known;
- DAG.computeKnownBits(C.Op0.getOperand(0), Known);
+ KnownBits Known = DAG.computeKnownBits(C.Op0.getOperand(0));
if ((~Known.Zero).getZExtValue() & ~Mask->getZExtValue())
return;
assert(Op.getValueType() == MVT::i64 && "Should be 64-bit operation");
// Get the known-zero masks for each operand.
- SDValue Ops[] = { Op.getOperand(0), Op.getOperand(1) };
- KnownBits Known[2];
- DAG.computeKnownBits(Ops[0], Known[0]);
- DAG.computeKnownBits(Ops[1], Known[1]);
+ SDValue Ops[] = {Op.getOperand(0), Op.getOperand(1)};
+ KnownBits Known[2] = {DAG.computeKnownBits(Ops[0]),
+ DAG.computeKnownBits(Ops[1])};
// See if the upper 32 bits of one operand and the lower 32 bits of the
// other are known zero. They are the low and high operands respectively.
}
// Get the known-zero mask for the operand.
- KnownBits Known;
- DAG.computeKnownBits(Op, Known);
+ KnownBits Known = DAG.computeKnownBits(Op);
unsigned NumSignificantBits = (~Known.Zero).getActiveBits();
if (NumSignificantBits == 0)
return DAG.getConstant(0, DL, VT);
unsigned OpNo) {
APInt Src0DemE = getDemandedSrcElements(Op, DemandedElts, OpNo);
APInt Src1DemE = getDemandedSrcElements(Op, DemandedElts, OpNo + 1);
- unsigned SrcBitWidth = Op.getOperand(OpNo).getScalarValueSizeInBits();
- KnownBits LHSKnown(SrcBitWidth), RHSKnown(SrcBitWidth);
- DAG.computeKnownBits(Op.getOperand(OpNo), LHSKnown, Src0DemE, Depth + 1);
- DAG.computeKnownBits(Op.getOperand(OpNo + 1), RHSKnown, Src1DemE, Depth + 1);
+ KnownBits LHSKnown =
+ DAG.computeKnownBits(Op.getOperand(OpNo), Src0DemE, Depth + 1);
+ KnownBits RHSKnown =
+ DAG.computeKnownBits(Op.getOperand(OpNo + 1), Src1DemE, Depth + 1);
Known.Zero = LHSKnown.Zero & RHSKnown.Zero;
Known.One = LHSKnown.One & RHSKnown.One;
}
case Intrinsic::s390_vuplf: {
SDValue SrcOp = Op.getOperand(1);
unsigned SrcBitWidth = SrcOp.getScalarValueSizeInBits();
- Known = KnownBits(SrcBitWidth);
APInt SrcDemE = getDemandedSrcElements(Op, DemandedElts, 0);
- DAG.computeKnownBits(SrcOp, Known, SrcDemE, Depth + 1);
+ Known = DAG.computeKnownBits(SrcOp, SrcDemE, Depth + 1);
if (IsLogical) {
Known = Known.zext(BitWidth);
Known.Zero.setBitsFrom(SrcBitWidth);
break;
case SystemZISD::REPLICATE: {
SDValue SrcOp = Op.getOperand(0);
- DAG.computeKnownBits(SrcOp, Known, Depth + 1);
+ Known = DAG.computeKnownBits(SrcOp, Depth + 1);
if (Known.getBitWidth() < BitWidth && isa<ConstantSDNode>(SrcOp))
Known = Known.sext(BitWidth); // VREPI sign extends the immedate.
break;