// Collect and sort WriteRes, ReadAdvance, and ProcResources.
void CodeGenSchedModels::collectProcResources() {
+ ProcResourceDefs = Records.getAllDerivedDefinitions("ProcResourceUnits");
+ ProcResGroups = Records.getAllDerivedDefinitions("ProcResGroup");
+
// Add any subtarget-specific SchedReadWrites that are directly associated
// with processor resources. Refer to the parent SchedClass's ProcIndices to
// determine which processors they apply to.
dbgs() << '\n');
verifyProcResourceGroups(PM);
}
+
+ ProcResourceDefs.clear();
+ ProcResGroups.clear();
}
void CodeGenSchedModels::checkCompleteness() {
return ProcResKind;
Record *ProcUnitDef = nullptr;
- RecVec ProcResourceDefs =
- Records.getAllDerivedDefinitions("ProcResourceUnits");
+ assert(!ProcResourceDefs.empty());
+ assert(!ProcResGroups.empty());
for (RecIter RI = ProcResourceDefs.begin(), RE = ProcResourceDefs.end();
RI != RE; ++RI) {
ProcUnitDef = *RI;
}
}
- RecVec ProcResGroups = Records.getAllDerivedDefinitions("ProcResGroup");
for (RecIter RI = ProcResGroups.begin(), RE = ProcResGroups.end();
RI != RE; ++RI) {
// Any inferred SchedClass has an index greater than NumInstrSchedClassses.
unsigned NumInstrSchedClasses;
+ RecVec ProcResourceDefs;
+ RecVec ProcResGroups;
+
// Map each instruction to its unique SchedClass index considering the
// combination of it's itinerary class, SchedRW list, and InstRW records.
typedef DenseMap<Record*, unsigned> InstClassMapTy;