const auto &CGOpts = CGM.getCodeGenOpts();
llvm::Reloc::Model RM = CGOpts.RelocationModel;
const auto &LOpts = CGM.getLangOpts();
- if (RM != llvm::Reloc::Static && !LOpts.PIE)
+ if (RM != llvm::Reloc::Static && !LOpts.PIE && !LOpts.OpenMPIsDevice)
return false;
// A definition cannot be preempted from an executable.
// CHECK-DAG: Bake
// CHECK-NOT: @{{hhh|ggg|fff|eee}} =
// CHECK-DAG: @aaa = external global i32,
-// CHECK-DAG: @bbb = global i32 0,
+// CHECK-DAG: @bbb ={{ dso_local | }}global i32 0,
// CHECK-DAG: weak constant %struct.__tgt_offload_entry { i8* bitcast (i32* @bbb to i8*),
// CHECK-DAG: @ccc = external global i32,
-// CHECK-DAG: @ddd = global i32 0,
+// CHECK-DAG: @ddd ={{ dso_local | }}global i32 0,
// CHECK-DAG: @hhh_decl_tgt_link_ptr = common global i32* null
// CHECK-DAG: @ggg_decl_tgt_link_ptr = common global i32* null
// CHECK-DAG: @fff_decl_tgt_link_ptr = common global i32* null
// CHECK-DAG: @eee_decl_tgt_link_ptr = common global i32* null
// CHECK-DAG: @{{.*}}maini1{{.*}}aaa = internal global i64 23,
-// CHECK-DAG: @b = global i32 15,
-// CHECK-DAG: @d = global i32 0,
+// CHECK-DAG: @b ={{ dso_local | }}global i32 15,
+// CHECK-DAG: @d ={{ dso_local | }}global i32 0,
// CHECK-DAG: @c = external global i32,
-// CHECK-DAG: @globals = global %struct.S zeroinitializer,
+// CHECK-DAG: @globals ={{ dso_local | }}global %struct.S zeroinitializer,
// CHECK-DAG: [[STAT:@.+stat]] = internal global %struct.S zeroinitializer,
// CHECK-DAG: [[STAT_REF:@.+]] = internal constant %struct.S* [[STAT]]
-// CHECK-DAG: @out_decl_target = global i32 0,
+// CHECK-DAG: @out_decl_target ={{ dso_local | }}global i32 0,
// CHECK-DAG: @llvm.used = appending global [6 x i8*] [i8* bitcast (void ()* @__omp_offloading__{{.+}}_globals_l[[@LINE+80]]_ctor to i8*), i8* bitcast (void ()* @__omp_offloading__{{.+}}_stat_l[[@LINE+81]]_ctor to i8*),
// CHECK-DAG: @llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (%struct.S** [[STAT_REF]] to i8*)],
extern const omp_allocator_handle_t omp_thread_mem_alloc;
// CHECK-DAG: @{{.+}}St1{{.+}}b{{.+}} = external global i32,
-// CHECK-DAG: @a = global i32 0,
-// CHECK-DAG: @b = addrspace(4) global i32 0,
-// CHECK-DAG: @c = global i32 0,
-// CHECK-DAG: @d = global %struct.St1 zeroinitializer,
-// CHECK-DAG: @{{.+}}ns{{.+}}a{{.+}} = addrspace(3) global i32 0,
+// CHECK-DAG: @a ={{ dso_local | }}global i32 0,
+// CHECK-DAG: @b ={{ dso_local | }}addrspace(4) global i32 0,
+// CHECK-DAG: @c ={{ dso_local | }}global i32 0,
+// CHECK-DAG: @d ={{ dso_local | }}global %struct.St1 zeroinitializer,
+// CHECK-DAG: @{{.+}}ns{{.+}}a{{.+}} ={{ dso_local | }}addrspace(3) global i32 0,
// CHECK-DAG: @{{.+}}main{{.+}}a{{.*}} = internal global i32 0,
// CHECK-DAG: @{{.+}}ST{{.+}}m{{.+}} = external global i32,
// CHECK-DAG: @bar_c = internal global i32 0,
void baz(float &);
-// CHECK: define void @{{.+}}bar{{.+}}()
+// CHECK: define{{ dso_local | }}void @{{.+}}bar{{.+}}()
void bar() {
// CHECK: alloca float,
float bar_a;
// SIMD-ONLY-NOT: {{__kmpc|__tgt}}
// DEVICE-DAG: [[C_ADDR:.+]] = internal global i32 0,
-// DEVICE-DAG: [[CD_ADDR:@.+]] = global %struct.S zeroinitializer,
+// DEVICE-DAG: [[CD_ADDR:@.+]] ={{ dso_local | }}global %struct.S zeroinitializer,
// HOST-DAG: @[[C_ADDR:.+]] = internal global i32 0,
-// HOST-DAG: @[[CD_ADDR:.+]] = global %struct.S zeroinitializer,
+// HOST-DAG: @[[CD_ADDR:.+]] ={{ dso_local | }}global %struct.S zeroinitializer,
#pragma omp declare target
int foo() { return 0; }
#pragma omp declare target (bar)
int caz() { return 0; }
-// DEVICE-DAG: define i32 [[FOO:@.*foo.*]]()
-// DEVICE-DAG: define i32 [[BAR:@.*bar.*]]()
-// DEVICE-DAG: define i32 [[BAZ:@.*baz.*]]()
-// DEVICE-DAG: define i32 [[DOO:@.*doo.*]]()
-// DEVICE-DAG: define i32 [[CAR:@.*car.*]]()
-// DEVICE-DAG: define i32 [[CAZ:@.*caz.*]]()
+// DEVICE-DAG: define{{ dso_local | }}i32 [[FOO:@.*foo.*]]()
+// DEVICE-DAG: define{{ dso_local | }}i32 [[BAR:@.*bar.*]]()
+// DEVICE-DAG: define{{ dso_local | }}i32 [[BAZ:@.*baz.*]]()
+// DEVICE-DAG: define{{ dso_local | }}i32 [[DOO:@.*doo.*]]()
+// DEVICE-DAG: define{{ dso_local | }}i32 [[CAR:@.*car.*]]()
+// DEVICE-DAG: define{{ dso_local | }}i32 [[CAZ:@.*caz.*]]()
static int c = foo() + bar() + baz();
#pragma omp declare target (c)
// CHECK: [[EXIT]]
// CHECK: ret void
- // CHECK: define i32 [[BAZ]](i32 [[F:%.*]], double* dereferenceable{{.*}})
+ // CHECK: define{{ dso_local | }}i32 [[BAZ]](i32 [[F:%.*]], double* dereferenceable{{.*}})
// CHECK: alloca i32,
// CHECK: [[LOCAL_F_PTR:%.+]] = alloca i32,
// CHECK: [[ZERO_ADDR:%.+]] = alloca i32,
#pragma omp declare target
T a = T();
T f = a;
-// CHECK: define void @{{.+}}foo{{.+}}([[T]]* byval align {{.+}})
+// CHECK: define{{ dso_local | }}void @{{.+}}foo{{.+}}([[T]]* byval align {{.+}})
void foo(T a = T()) {
return;
}
-// CHECK: define [6 x i64] @{{.+}}bar{{.+}}()
+// CHECK: define{{ dso_local | }}[6 x i64] @{{.+}}bar{{.+}}()
T bar() {
// CHECK: bitcast [[T]]* %{{.+}} to [6 x i64]*
// CHECK-NEXT: load [6 x i64], [6 x i64]* %{{.+}},
// CHECK-NEXT: ret [6 x i64]
return T();
}
-// CHECK: define void @{{.+}}baz{{.+}}()
+// CHECK: define{{ dso_local | }}void @{{.+}}baz{{.+}}()
void baz() {
// CHECK: call [6 x i64] @{{.+}}bar{{.+}}()
// CHECK-NEXT: bitcast [[T]]* %{{.+}} to [6 x i64]*
}
T1 a1 = T1();
T1 f1 = a1;
-// CHECK: define void @{{.+}}foo1{{.+}}([[T1]]* byval align {{.+}})
+// CHECK: define{{ dso_local | }}void @{{.+}}foo1{{.+}}([[T1]]* byval align {{.+}})
void foo1(T1 a = T1()) {
return;
}
-// CHECK: define [[T1]] @{{.+}}bar1{{.+}}()
+// CHECK: define{{ dso_local | }}[[T1]] @{{.+}}bar1{{.+}}()
T1 bar1() {
// CHECK: load [[T1]], [[T1]]*
// CHECK-NEXT: ret [[T1]]
return T1();
}
-// CHECK: define void @{{.+}}baz1{{.+}}()
+// CHECK: define{{ dso_local | }}void @{{.+}}baz1{{.+}}()
void baz1() {
// CHECK: call [[T1]] @{{.+}}bar1{{.+}}()
T1 t = bar1();