#include <emmintrin.h>
-#if !defined (__AES__)
-# error "AES instructions not enabled"
-#else
-
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("aes")))
static __inline__ __m128i DEFAULT_FN_ATTRS
_mm_aesenc_si128(__m128i __V, __m128i __R)
#undef DEFAULT_FN_ATTRS
-#endif
-
#endif /* _WMMINTRIN_AES_H */
#ifndef _WMMINTRIN_PCLMUL_H
#define _WMMINTRIN_PCLMUL_H
-#if !defined (__PCLMUL__)
-# error "PCLMUL instruction is not enabled"
-#else
#define _mm_clmulepi64_si128(__X, __Y, __I) \
((__m128i)__builtin_ia32_pclmulqdq128((__v2di)(__m128i)(__X), \
(__v2di)(__m128i)(__Y), (char)(__I)))
-#endif
#endif /* _WMMINTRIN_PCLMUL_H */
#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
/* Intrinsics that are available only if __ADX__ defined */
-#ifdef __ADX__
-static __inline unsigned char DEFAULT_FN_ATTRS
+static __inline unsigned char __attribute__((__always_inline__, __nodebug__, __target__("adx")))
_addcarryx_u32(unsigned char __cf, unsigned int __x, unsigned int __y,
unsigned int *__p)
{
}
#ifdef __x86_64__
-static __inline unsigned char DEFAULT_FN_ATTRS
+static __inline unsigned char __attribute__((__always_inline__, __nodebug__, __target__("adx")))
_addcarryx_u64(unsigned char __cf, unsigned long long __x,
unsigned long long __y, unsigned long long *__p)
{
return __builtin_ia32_addcarryx_u64(__cf, __x, __y, __p);
}
#endif
-#endif
/* Intrinsics that are also available if __ADX__ undefined */
static __inline unsigned char DEFAULT_FN_ATTRS
#ifndef __AMMINTRIN_H
#define __AMMINTRIN_H
-#ifndef __SSE4A__
-#error "SSE4A instruction set not enabled"
-#else
-
#include <pmmintrin.h>
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse4a")))
/// \brief Extracts the specified bits from the lower 64 bits of the 128-bit
/// integer vector operand at the index idx and of the length len.
#undef DEFAULT_FN_ATTRS
-#endif /* __SSE4A__ */
-
#endif /* __AMMINTRIN_H */
#define __AVX2INTRIN_H
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx2")))
/* SSE4 Multiple Packed Sums of Absolute Difference. */
#define _mm256_mpsadbw_epu8(X, Y, M) __builtin_ia32_mpsadbw256((X), (Y), (M))
typedef short __v32hi __attribute__ ((__vector_size__ (64)));
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512bw")))
static __inline __v64qi DEFAULT_FN_ATTRS
_mm512_setzero_qi (void) {
#define __AVX512DQINTRIN_H
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512dq")))
static __inline__ __m512i DEFAULT_FN_ATTRS
_mm512_mullo_epi64 (__m512i __A, __m512i __B) {
#define _MM_FROUND_CUR_DIRECTION 0x04
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512f")))
/* Create vectors with repeated elements */
#define __AVX512VLBWINTRIN_H
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vl,avx512bw")))
/* Integer compare */
#define __AVX512VLDQINTRIN_H
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vl,avx512dq")))
static __inline__ __m256i DEFAULT_FN_ATTRS
_mm256_mullo_epi64 (__m256i __A, __m256i __B) {
#define __AVX512VLINTRIN_H
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vl")))
/* Integer compare */
typedef long long __m256i __attribute__((__vector_size__(32)));
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx")))
/* Arithmetic */
static __inline __m256d DEFAULT_FN_ATTRS
#error "Never use <bmi2intrin.h> directly; include <x86intrin.h> instead."
#endif
-#ifndef __BMI2__
-# error "BMI2 instruction set not enabled"
-#endif /* __BMI2__ */
-
#ifndef __BMI2INTRIN_H
#define __BMI2INTRIN_H
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("bmi2")))
static __inline__ unsigned int DEFAULT_FN_ATTRS
_bzhi_u32(unsigned int __X, unsigned int __Y)
#error "Never use <bmiintrin.h> directly; include <x86intrin.h> instead."
#endif
-#ifndef __BMI__
-# error "BMI instruction set not enabled"
-#endif /* __BMI__ */
-
#ifndef __BMIINTRIN_H
#define __BMIINTRIN_H
#define _tzcnt_u32(a) (__tzcnt_u32((a)))
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("bmi")))
static __inline__ unsigned short DEFAULT_FN_ATTRS
__tzcnt_u16(unsigned short __X)
#ifndef __EMMINTRIN_H
#define __EMMINTRIN_H
-#ifndef __SSE2__
-#error "SSE2 instruction set not enabled"
-#else
-
#include <xmmintrin.h>
typedef double __m128d __attribute__((__vector_size__(16)));
typedef char __v16qi __attribute__((__vector_size__(16)));
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse2")))
static __inline__ __m128d DEFAULT_FN_ATTRS
_mm_add_sd(__m128d __a, __m128d __b)
#define _MM_SHUFFLE2(x, y) (((x) << 1) | (y))
-#endif /* __SSE2__ */
-
#endif /* __EMMINTRIN_H */
#error "Never use <f16cintrin.h> directly; include <x86intrin.h> instead."
#endif
-#ifndef __F16C__
-# error "F16C instruction is not enabled"
-#endif /* __F16C__ */
-
#ifndef __F16CINTRIN_H
#define __F16CINTRIN_H
typedef float __m256 __attribute__ ((__vector_size__ (32)));
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("f16c")))
#define _mm_cvtps_ph(a, imm) __extension__ ({ \
__m128 __a = (a); \
#ifndef __FMA4INTRIN_H
#define __FMA4INTRIN_H
-#ifndef __FMA4__
-# error "FMA4 instruction set is not enabled"
-#else
-
#include <pmmintrin.h>
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("fma4")))
static __inline__ __m128 DEFAULT_FN_ATTRS
_mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
#undef DEFAULT_FN_ATTRS
-#endif /* __FMA4__ */
-
#endif /* __FMA4INTRIN_H */
#ifndef __FMAINTRIN_H
#define __FMAINTRIN_H
-#ifndef __FMA__
-# error "FMA instruction set is not enabled"
-#else
-
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("fma")))
static __inline__ __m128 DEFAULT_FN_ATTRS
_mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C)
#undef DEFAULT_FN_ATTRS
-#endif /* __FMA__ */
-
#endif /* __FMAINTRIN_H */
#ifndef __IMMINTRIN_H
#define __IMMINTRIN_H
-#ifdef __MMX__
#include <mmintrin.h>
-#endif
-#ifdef __SSE__
#include <xmmintrin.h>
-#endif
-#ifdef __SSE2__
#include <emmintrin.h>
-#endif
-#ifdef __SSE3__
#include <pmmintrin.h>
-#endif
-#ifdef __SSSE3__
#include <tmmintrin.h>
-#endif
-#if defined (__SSE4_2__) || defined (__SSE4_1__)
#include <smmintrin.h>
-#endif
-#if defined (__AES__) || defined (__PCLMUL__)
#include <wmmintrin.h>
-#endif
-#ifdef __AVX__
#include <avxintrin.h>
-#endif
-#ifdef __AVX2__
#include <avx2intrin.h>
-#endif
-#ifdef __BMI__
#include <bmiintrin.h>
-#endif
-#ifdef __BMI2__
#include <bmi2intrin.h>
-#endif
-#ifdef __LZCNT__
#include <lzcntintrin.h>
-#endif
-#ifdef __FMA__
#include <fmaintrin.h>
-#endif
-#ifdef __AVX512F__
#include <avx512fintrin.h>
-#endif
-#ifdef __AVX512VL__
#include <avx512vlintrin.h>
-#endif
-#ifdef __AVX512BW__
#include <avx512bwintrin.h>
-#endif
-#ifdef __AVX512DQ__
#include <avx512dqintrin.h>
-#endif
-#if defined (__AVX512VL__) && defined (__AVX512BW__)
#include <avx512vlbwintrin.h>
-#endif
-#if defined (__AVX512VL__) && defined (__AVX512DQ__)
#include <avx512vldqintrin.h>
-#endif
-#ifdef __AVX512ER__
#include <avx512erintrin.h>
-#endif
-#ifdef __RDRND__
-static __inline__ int __attribute__((__always_inline__, __nodebug__))
+static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
_rdrand16_step(unsigned short *__p)
{
return __builtin_ia32_rdrand16_step(__p);
}
-static __inline__ int __attribute__((__always_inline__, __nodebug__))
+static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
_rdrand32_step(unsigned int *__p)
{
return __builtin_ia32_rdrand32_step(__p);
}
#ifdef __x86_64__
-static __inline__ int __attribute__((__always_inline__, __nodebug__))
+static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
_rdrand64_step(unsigned long long *__p)
{
return __builtin_ia32_rdrand64_step(__p);
}
#endif
-#endif /* __RDRND__ */
-#ifdef __FSGSBASE__
#ifdef __x86_64__
-static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__))
+static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
_readfsbase_u32(void)
{
return __builtin_ia32_rdfsbase32();
}
-static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__))
+static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
_readfsbase_u64(void)
{
return __builtin_ia32_rdfsbase64();
}
-static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__))
+static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
_readgsbase_u32(void)
{
return __builtin_ia32_rdgsbase32();
}
-static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__))
+static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
_readgsbase_u64(void)
{
return __builtin_ia32_rdgsbase64();
}
-static __inline__ void __attribute__((__always_inline__, __nodebug__))
+static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
_writefsbase_u32(unsigned int __V)
{
return __builtin_ia32_wrfsbase32(__V);
}
-static __inline__ void __attribute__((__always_inline__, __nodebug__))
+static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
_writefsbase_u64(unsigned long long __V)
{
return __builtin_ia32_wrfsbase64(__V);
}
-static __inline__ void __attribute__((__always_inline__, __nodebug__))
+static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
_writegsbase_u32(unsigned int __V)
{
return __builtin_ia32_wrgsbase32(__V);
}
-static __inline__ void __attribute__((__always_inline__, __nodebug__))
+static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
_writegsbase_u64(unsigned long long __V)
{
return __builtin_ia32_wrgsbase64(__V);
}
#endif
-#endif /* __FSGSBASE__ */
-#ifdef __RTM__
#include <rtmintrin.h>
-#endif
/* FIXME: check __HLE__ as well when HLE is supported. */
-#if defined (__RTM__)
-static __inline__ int __attribute__((__always_inline__, __nodebug__))
+static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rtm")))
_xtest(void)
{
return __builtin_ia32_xtest();
}
-#endif
-#ifdef __SHA__
#include <shaintrin.h>
-#endif
/* Some intrinsics inside adxintrin.h are available only if __ADX__ defined,
* whereas others are also available if __ADX__ undefined */
#error "Never use <lzcntintrin.h> directly; include <x86intrin.h> instead."
#endif
-#ifndef __LZCNT__
-# error "LZCNT instruction is not enabled"
-#endif /* __LZCNT__ */
-
#ifndef __LZCNTINTRIN_H
#define __LZCNTINTRIN_H
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("lzcnt")))
static __inline__ unsigned short DEFAULT_FN_ATTRS
__lzcnt16(unsigned short __X)
typedef float __v2sf __attribute__((__vector_size__(8)));
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("3dnow")))
static __inline__ void DEFAULT_FN_ATTRS
_m_femms() {
#ifndef __MMINTRIN_H
#define __MMINTRIN_H
-#ifndef __MMX__
-#error "MMX instruction set not enabled"
-#else
-
typedef long long __m64 __attribute__((__vector_size__(8)));
typedef int __v2si __attribute__((__vector_size__(8)));
typedef char __v8qi __attribute__((__vector_size__(8)));
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("mmx")))
static __inline__ void DEFAULT_FN_ATTRS
_mm_empty(void)
#define _m_pcmpgtw _mm_cmpgt_pi16
#define _m_pcmpgtd _mm_cmpgt_pi32
-#endif /* __MMX__ */
-
#endif /* __MMINTRIN_H */
#ifndef _NMMINTRIN_H
#define _NMMINTRIN_H
-#ifndef __SSE4_2__
-#error "SSE4.2 instruction set not enabled"
-#else
-
/* To match expectations of gcc we put the sse4.2 definitions into smmintrin.h,
just include it now then. */
#include <smmintrin.h>
-#endif /* __SSE4_2__ */
#endif /* _NMMINTRIN_H */
#ifndef __PMMINTRIN_H
#define __PMMINTRIN_H
-#ifndef __SSE3__
-#error "SSE3 instruction set not enabled"
-#else
-
#include <emmintrin.h>
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse3")))
static __inline__ __m128i DEFAULT_FN_ATTRS
_mm_lddqu_si128(__m128i const *__p)
#undef DEFAULT_FN_ATTRS
-#endif /* __SSE3__ */
-
#endif /* __PMMINTRIN_H */
*===-----------------------------------------------------------------------===
*/
-#ifndef __POPCNT__
-#error "POPCNT instruction set not enabled"
-#endif
-
#ifndef _POPCNTINTRIN_H
#define _POPCNTINTRIN_H
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("popcnt")))
static __inline__ int DEFAULT_FN_ATTRS
_mm_popcnt_u32(unsigned int __A)
#ifndef __RDSEEDINTRIN_H
#define __RDSEEDINTRIN_H
-#ifdef __RDSEED__
-
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("rdseed")))
static __inline__ int DEFAULT_FN_ATTRS
_rdseed16_step(unsigned short *__p)
#undef DEFAULT_FN_ATTRS
-#endif /* __RDSEED__ */
#endif /* __RDSEEDINTRIN_H */
#define _XABORT_CODE(x) (((x) >> 24) & 0xFF)
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("rtm")))
static __inline__ unsigned int DEFAULT_FN_ATTRS
_xbegin(void)
#ifndef __SHAINTRIN_H
#define __SHAINTRIN_H
-#if !defined (__SHA__)
-# error "SHA instructions not enabled"
-#endif
-
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sha")))
#define _mm_sha1rnds4_epu32(V1, V2, M) __extension__ ({ \
__builtin_ia32_sha1rnds4((V1), (V2), (M)); })
#ifndef _SMMINTRIN_H
#define _SMMINTRIN_H
-#ifndef __SSE4_1__
-#error "SSE4.1 instruction set not enabled"
-#else
-
#include <tmmintrin.h>
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse4.1")))
/* SSE4 Rounding macros. */
#define _MM_FROUND_TO_NEAREST_INT 0x00
return (__m128i) __builtin_ia32_phminposuw128((__v8hi)__V);
}
+/* Handle the sse4.2 definitions here. */
+
/* These definitions are normally in nmmintrin.h, but gcc puts them in here
so we'll do the same. */
-#ifdef __SSE4_2__
+
+#undef DEFAULT_FN_ATTRS
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse4.2")))
/* These specify the type of data that we're comparing. */
#define _SIDD_UBYTE_OPS 0x00
#include <popcntintrin.h>
#endif
-#endif /* __SSE4_2__ */
-#endif /* __SSE4_1__ */
-
#endif /* _SMMINTRIN_H */
*===-----------------------------------------------------------------------===
*/
-#ifndef __TBM__
-#error "TBM instruction set is not enabled"
-#endif
-
#ifndef __X86INTRIN_H
#error "Never use <tbmintrin.h> directly; include <x86intrin.h> instead."
#endif
#define __TBMINTRIN_H
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("tbm")))
#define __bextri_u32(a, b) (__builtin_ia32_bextri_u32((a), (b)))
#ifndef __TMMINTRIN_H
#define __TMMINTRIN_H
-#ifndef __SSSE3__
-#error "SSSE3 instruction set not enabled"
-#else
-
#include <pmmintrin.h>
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("ssse3")))
static __inline__ __m64 DEFAULT_FN_ATTRS
_mm_abs_pi8(__m64 __a)
#undef DEFAULT_FN_ATTRS
-#endif /* __SSSE3__ */
-
#endif /* __TMMINTRIN_H */
#include <emmintrin.h>
-#if !defined (__AES__) && !defined (__PCLMUL__)
-# error "AES/PCLMUL instructions not enabled"
-#else
-
-#ifdef __AES__
#include <__wmmintrin_aes.h>
-#endif /* __AES__ */
-#ifdef __PCLMUL__
#include <__wmmintrin_pclmul.h>
-#endif /* __PCLMUL__ */
-#endif /* __AES__ || __PCLMUL__ */
#endif /* _WMMINTRIN_H */
#include <immintrin.h>
-#ifdef __3dNOW__
#include <mm3dnow.h>
-#endif
-#ifdef __BMI__
#include <bmiintrin.h>
-#endif
-#ifdef __BMI2__
#include <bmi2intrin.h>
-#endif
-#ifdef __LZCNT__
#include <lzcntintrin.h>
-#endif
-#ifdef __POPCNT__
#include <popcntintrin.h>
-#endif
-#ifdef __RDSEED__
#include <rdseedintrin.h>
-#endif
-#ifdef __PRFCHW__
#include <prfchwintrin.h>
-#endif
-#ifdef __SSE4A__
#include <ammintrin.h>
-#endif
-#ifdef __FMA4__
#include <fma4intrin.h>
-#endif
-#ifdef __XOP__
#include <xopintrin.h>
-#endif
-#ifdef __TBM__
#include <tbmintrin.h>
-#endif
-#ifdef __F16C__
#include <f16cintrin.h>
-#endif
/* FIXME: LWP */
#ifndef __XMMINTRIN_H
#define __XMMINTRIN_H
-#ifndef __SSE__
-#error "SSE instruction set not enabled"
-#else
-
#include <mmintrin.h>
typedef int __v4si __attribute__((__vector_size__(16)));
#endif
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse")))
static __inline__ __m128 DEFAULT_FN_ATTRS
_mm_add_ss(__m128 __a, __m128 __b)
#include <emmintrin.h>
#endif
-#endif /* __SSE__ */
-
#endif /* __XMMINTRIN_H */
#ifndef __XOPINTRIN_H
#define __XOPINTRIN_H
-#ifndef __XOP__
-# error "XOP instruction set is not enabled"
-#else
-
#include <fma4intrin.h>
/* Define the default attributes for the functions in this file. */
-#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
+#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("xop")))
static __inline__ __m128i DEFAULT_FN_ATTRS
_mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
#undef DEFAULT_FN_ATTRS
-#endif /* __XOP__ */
-
#endif /* __XOPINTRIN_H */
--- /dev/null
+// RUN: %clang_cc1 -fsyntax-only -ffreestanding %s -verify
+// RUN: %clang_cc1 -fsyntax-only -ffreestanding -x c++ %s -verify
+// expected-no-diagnostics
+
+#if defined(i386) || defined(__x86_64__)
+#include <pmmintrin.h>
+
+int __attribute__((__target__(("sse3")))) foo(int a) {
+ _mm_mwait(0, 0);
+ return 4;
+}
+#endif
--- /dev/null
+// RUN: %clang_cc1 -fsyntax-only -ffreestanding %s -verify
+// RUN: %clang_cc1 -fsyntax-only -ffreestanding -fno-lax-vector-conversions %s -verify
+// RUN: %clang_cc1 -fsyntax-only -ffreestanding -x c++ %s -verify
+// expected-no-diagnostics
+
+#if defined(i386) || defined(__x86_64__)
+
+// Include the metaheader that includes all x86 intrinsic headers.
+#include <x86intrin.h>
+
+void __attribute__((__target__("mmx"))) mm_empty_wrap(void) {
+ _mm_empty();
+}
+
+__m128 __attribute__((__target__("sse"))) mm_add_ss_wrap(__m128 a, __m128 b) {
+ return _mm_add_ss(a, b);
+}
+
+__m128d __attribute__((__target__("sse2"))) mm_sqrt_sd_wrap(__m128d a, __m128d b) {
+ return _mm_sqrt_sd(a, b);
+}
+
+void __attribute__((__target__("sse3"))) mm_mwait_wrap(int a) {
+ _mm_mwait(0, 0);
+}
+
+__m64 __attribute__((__target__("ssse3"))) mm_abs_pi8_wrap(__m64 a) {
+ return _mm_abs_pi8(a);
+}
+
+__m128i __attribute__((__target__("sse4.1"))) mm_minpos_epu16_wrap(__m128i v) {
+ return _mm_minpos_epu16(v);
+}
+
+unsigned int __attribute__((__target__("sse4.2"))) mm_crc32_u8_wrap(unsigned int c, unsigned char d) {
+ return _mm_crc32_u8(c, d);
+}
+
+__m128i __attribute__((__target__("aes"))) mm_aesenc_si128_wrap(__m128i v, __m128i r) {
+ return _mm_aesenc_si128(v, r);
+}
+
+__m256d __attribute__((__target__("avx"))) mm256_add_pd_wrap(__m256d a, __m256d b) {
+ return _mm256_add_pd(a, b);
+}
+
+__m256i __attribute__((__target__("avx2"))) mm256_abs_epi8_wrap(__m256i a) {
+ return _mm256_abs_epi8(a);
+}
+
+unsigned short __attribute__((__target__("bmi"))) tzcnt_u16_wrap(unsigned short x) {
+ return __tzcnt_u16(x);
+}
+
+unsigned int __attribute__((__target__("bmi2"))) bzhi_u32_wrap(unsigned int x, unsigned int y) {
+ return _bzhi_u32(x, y);
+}
+
+unsigned short __attribute__((__target__("lzcnt"))) lzcnt16_wrap(unsigned short x) {
+ return __lzcnt16(x);
+}
+
+__m256d __attribute__((__target__("fma"))) mm256_fmsubadd_pd_wrap(__m256d a, __m256d b, __m256d c) {
+ return _mm256_fmsubadd_pd(a, b, c);
+}
+
+__m512i __attribute__((__target__("avx512f"))) mm512_setzero_si512_wrap(void) {
+ return _mm512_setzero_si512();
+}
+
+__mmask8 __attribute__((__target__("avx512vl"))) mm_cmpeq_epi32_mask_wrap(__m128i a, __m128i b) {
+ return _mm_cmpeq_epi32_mask(a, b);
+}
+
+__v64qi __attribute__((__target__("avx512bw"))) mm512_setzero_qi_wrap(void) {
+ return _mm512_setzero_qi();
+}
+
+__m512i __attribute__((__target__("avx512dq"))) mm512_mullo_epi64_wrap(__m512i a, __m512i b) {
+ return _mm512_mullo_epi64(a, b);
+}
+
+__mmask16 __attribute__((__target__("avx512vl,avx512bw"))) mm_cmpeq_epi8_mask_wrap(__m128i a, __m128i b) {
+ return _mm_cmpeq_epi8_mask(a, b);
+}
+
+__m256i __attribute__((__target__("avx512vl,avx512dq"))) mm256_mullo_epi64_wrap(__m256i a, __m256i b) {
+ return _mm256_mullo_epi64(a, b);
+}
+
+int __attribute__((__target__("rdrnd"))) rdrand16_step_wrap(unsigned short *p) {
+ return _rdrand16_step(p);
+}
+
+unsigned int __attribute__((__target__("fsgsbase"))) readfsbase_u32_wrap(void) {
+ return _readfsbase_u32();
+}
+
+unsigned int __attribute__((__target__("rtm"))) xbegin_wrap(void) {
+ return _xbegin();
+}
+
+__m128i __attribute__((__target__("sha"))) mm_sha1nexte_epu32_wrap(__m128i x, __m128i y) {
+ return _mm_sha1nexte_epu32(x, y);
+}
+
+int __attribute__((__target__("rdseed"))) rdseed16_step_wrap(unsigned short *p) {
+ return _rdseed16_step(p);
+}
+
+__m128i __attribute__((__target__("sse4a"))) mm_extract_si64_wrap(__m128i x, __m128i y) {
+ return _mm_extract_si64(x, y);
+}
+
+__m128 __attribute__((__target__("fma4"))) mm_macc_ps_wrap(__m128 a, __m128 b, __m128 c) {
+ return _mm_macc_ps(a, b, c);
+}
+
+__m256 __attribute__((__target__("xop"))) mm256_frcz_ps_wrap(__m256 a) {
+ return _mm256_frcz_ps(a);
+}
+
+unsigned int __attribute__((__target__("tbm"))) blcfill_u32_wrap(unsigned int a) {
+ return __blcfill_u32(a);
+}
+
+__m128 __attribute__((__target__("f16c"))) mm_cvtph_ps_wrap(__m128i a) {
+ return _mm_cvtph_ps(a);
+}
+
+#endif
#if defined(i386) || defined(__x86_64__)
-// Pretend to enable all features.
-#ifndef __3dNOW__
-#define __3dNOW__
-#endif
-#ifndef __BMI__
-#define __BMI__
-#endif
-#ifndef __BMI2__
-#define __BMI2__
-#endif
-#ifndef __LZCNT__
-#define __LZCNT__
-#endif
-#ifndef __POPCNT__
-#define __POPCNT__
-#endif
-#ifndef __RDSEED__
-#define __RDSEED__
-#endif
-#ifndef __PRFCHW__
-#define __PRFCHW__
-#endif
-#ifndef __SSE4A__
-#define __SSE4A__
-#endif
-#ifndef __FMA4__
-#define __FMA4__
-#endif
-#ifndef __XOP__
-#define __XOP__
-#endif
-#ifndef __F16C__
-#define __F16C__
-#endif
-#ifndef __MMX__
-#define __MMX__
-#endif
-#ifndef __SSE__
-#define __SSE__
-#endif
-#ifndef __SSE2__
-#define __SSE2__
-#endif
-#ifndef __SSE3__
-#define __SSE3__
-#endif
-#ifndef __SSSE3__
-#define __SSSE3__
-#endif
-#ifndef __SSE4_1__
-#define __SSE4_1__
-#endif
-#ifndef __SSE4_2__
-#define __SSE4_2__
-#endif
-#ifndef __AES__
-#define __AES__
-#endif
-#ifndef __AVX__
-#define __AVX__
-#endif
-#ifndef __AVX2__
-#define __AVX2__
-#endif
-#ifndef __BMI__
-#define __BMI__
-#endif
-#ifndef __BMI2__
-#define __BMI2__
-#endif
-#ifndef __LZCNT__
-#define __LZCNT__
-#endif
-#ifndef __FMA__
-#define __FMA__
-#endif
-#ifndef __RDRND__
-#define __RDRND__
-#endif
-#ifndef __SHA__
-#define __SHA__
-#endif
-#ifndef __ADX__
-#define __ADX__
-#endif
-#ifndef __TBM__
-#define __TBM__
-#endif
-#ifndef __RTM__
-#define __RTM__
-#endif
-#ifndef __PCLMUL__
-#define __PCLMUL__
-#endif
-#ifndef __FSGSBASE__
-#define __FSGSBASE__
-#endif
-#ifndef __AVX512F__
-#define __AVX512F__
-#endif
-#ifndef __AVX512VL__
-#define __AVX512VL__
-#endif
-#ifndef __AVX512BW__
-#define __AVX512BW__
-#endif
-#ifndef __AVX512ER__
-#define __AVX512ER__
-#endif
-#ifndef __AVX512PF__
-#define __AVX512PF__
-#endif
-#ifndef __AVX512DQ__
-#define __AVX512DQ__
-#endif
-#ifndef __AVX512CD__
-#define __AVX512CD__
-#endif
-
-// Now include the metaheader that includes all x86 intrinsic headers.
+// Include the metaheader that includes all x86 intrinsic headers.
#include <x86intrin.h>
#endif