GlobalISel: avoid looking too closely at PHIs when we bail.

The function used to finish off PHIs by adding the relevant basic blocks can
fail if we're aborting and still don't actually have the needed
MachineBasicBlocks. So avoid trying in that case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288727 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/GlobalISel/IRTranslator.cpp b/lib/CodeGen/GlobalISel/IRTranslator.cpp
index 68fec1a555f0b1cccc49e9bd8bde0380724c9bd3..c986e65049f1939465f2423066e9f072dbb52071 100644 (file)
--- a/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -678,8 +678,6 @@ void IRTranslator::finishPendingPhis() {
       MIB.addMBB(BBToMBB[PI->getIncomingBlock(i)]);
     }
   }
-
-  PendingPHIs.clear();
 }
 
 bool IRTranslator::translate(const Instruction &Inst) {
@@ -725,10 +723,9 @@ bool IRTranslator::translate(const Constant &C, unsigned Reg) {
 }
 
 void IRTranslator::finalizeFunction() {
-  finishPendingPhis();
-
   // Release the memory used by the different maps we
   // needed during the translation.
+  PendingPHIs.clear();
   ValToVReg.clear();
   FrameIndices.clear();
   Constants.clear();
@@ -758,6 +755,7 @@ bool IRTranslator::runOnMachineFunction(MachineFunction &MF) {
     if (!TPC->isGlobalISelAbortEnabled()) {
       MIRBuilder.getMF().getProperties().set(
           MachineFunctionProperties::Property::FailedISel);
+      finalizeFunction();
       return false;
     }
     report_fatal_error("Unable to lower arguments");
@@ -777,7 +775,7 @@ bool IRTranslator::runOnMachineFunction(MachineFunction &MF) {
     MIRBuilder.setMBB(MBB);
 
     for (const Instruction &Inst: BB) {
-      bool Succeeded = translate(Inst);
+      Succeeded &= translate(Inst);
       if (!Succeeded) {
         if (TPC->isGlobalISelAbortEnabled())
           reportTranslationError(Inst, "unable to translate instruction");
@@ -787,11 +785,15 @@ bool IRTranslator::runOnMachineFunction(MachineFunction &MF) {
     }
   }
 
-  finalizeFunction();
+  if (Succeeded) {
+    finishPendingPhis();
+
+    // Now that the MachineFrameInfo has been configured, no further changes to
+    // the reserved registers are possible.
+    MRI->freezeReservedRegs(MF);
+  }
 
-  // Now that the MachineFrameInfo has been configured, no further changes to
-  // the reserved registers are possible.
-  MRI->freezeReservedRegs(MF);
+  finalizeFunction();
 
   return false;
 }

diff --git a/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll b/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
index 25d6c1f191cf22953225e7a54c16b9e9586e5659..e7b1f04e03beeef9d1348e425f263c42e6859e54 100644 (file)
--- a/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
+++ b/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
@@ -36,4 +36,24 @@ define i128 @ABIi128(i128 %arg1) {
 ; FALLBACK-WITH-REPORT-OUT: fmov d0, #1.0
 define [1 x double] @constant() {
   ret [1 x double] [double 1.0]
+}
+
+  ; The key problem here is that we may fail to create an MBB referenced by a
+  ; PHI. If so, we cannot complete the G_PHI and mustn't try or bad things
+  ; happen.
+; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for pending_phis
+define i32 @pending_phis(i1 %tst, i32 %val, i32* %addr) {
+  br i1 %tst, label %true, label %false
+
+end:
+  %res = phi i32 [%val, %true], [42, %false]
+  ret i32 %res
+
+true:
+  store atomic i32 42, i32* %addr seq_cst, align 4
+  br label %end
+
+false:
+  br label %end
+
 }