[TargetLowering] Extend bool args to inline-asm according to getBooleanType

Summary:
This extends Krzysztof Parzyszek's X86-specific solution
(https://reviews.llvm.org/D60208) to the generic code pointed out by
James Y Knight.

Reviewers: kparzysz, craig.topper, nickdesaulniers

Subscribers: efriedma, sdardis, nemanjai, javed.absar, eraman, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, llvm-commits, srhines, void, nickdesaulniers, jyknight

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60224

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361404 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 74683fcf585957437e880cc3db01c99b93005c40..4d950984b29ce1563a958bbdb1de60453c88c657 100644 (file)
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3562,7 +3562,16 @@ void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
         return;
       } else if ((C = dyn_cast<ConstantSDNode>(Op)) &&
                  ConstraintLetter != 's') {
-        Ops.push_back(DAG.getTargetConstant(Offset + C->getSExtValue(),
+        // gcc prints these as sign extended.  Sign extend value to 64 bits
+        // now; without this it would get ZExt'd later in
+        // ScheduleDAGSDNodes::EmitNode, which is very generic.
+        bool IsBool = C->getConstantIntValue()->getBitWidth() == 1;
+        BooleanContent BCont = getBooleanContents(MVT::i64);
+        ISD::NodeType ExtOpc = IsBool ? getExtendForContent(BCont)
+                                      : ISD::SIGN_EXTEND;
+        int64_t ExtVal = ExtOpc == ISD::ZERO_EXTEND ? C->getZExtValue()
+                                                    : C->getSExtValue();
+        Ops.push_back(DAG.getTargetConstant(Offset + ExtVal,
                                             SDLoc(C), MVT::i64));
         return;
       } else {

diff --git a/test/CodeGen/AArch64/inline-asm-i-constraint-i1.ll b/test/CodeGen/AArch64/inline-asm-i-constraint-i1.ll
new file mode 100644 (file)
index 0000000..7a18963
--- /dev/null
+++ b/test/CodeGen/AArch64/inline-asm-i-constraint-i1.ll
@@ -0,0 +1,14 @@
+; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
+
+; Make sure that boolean immediates are properly (zero) extended.
+; CHECK: TEST 42 + 1 - .
+
+target triple = "aarch64-unknown-linux-gnu"
+
+define i32 @foo() #0 {
+entry:
+  tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
+  ret i32 1
+}
+
+attributes #0 = { nounwind }

diff --git a/test/CodeGen/ARM/inline-asm-i-constraint-i1.ll b/test/CodeGen/ARM/inline-asm-i-constraint-i1.ll
new file mode 100644 (file)
index 0000000..79345b9
--- /dev/null
+++ b/test/CodeGen/ARM/inline-asm-i-constraint-i1.ll
@@ -0,0 +1,14 @@
+; RUN: llc -mtriple=armv7-unknown-linux-gnueabi < %s | FileCheck %s
+
+; Make sure that boolean immediates are properly (zero) extended.
+; CHECK: TEST 42 + 1 - .
+
+target triple = "armv7-unknown-linux-gnueabi"
+
+define i32 @foo() #0 {
+entry:
+  tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
+  ret i32 1
+}
+
+attributes #0 = { nounwind }

diff --git a/test/CodeGen/Mips/inline-asm-i-constraint-i1.ll b/test/CodeGen/Mips/inline-asm-i-constraint-i1.ll
new file mode 100644 (file)
index 0000000..598b20f
--- /dev/null
+++ b/test/CodeGen/Mips/inline-asm-i-constraint-i1.ll
@@ -0,0 +1,14 @@
+; RUN: llc -mtriple=mips64el-unknown-linux-gnu < %s | FileCheck %s
+
+; Make sure that boolean immediates are properly (zero) extended.
+; CHECK: TEST 42 + 1 - .
+
+target triple = "mips64el-unknown-linux-gnu"
+
+define i32 @foo() #0 {
+entry:
+  tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
+  ret i32 1
+}
+
+attributes #0 = { nounwind }

diff --git a/test/CodeGen/PowerPC/inline-asm-i-constraint-i1.ll b/test/CodeGen/PowerPC/inline-asm-i-constraint-i1.ll
new file mode 100644 (file)
index 0000000..9f60265
--- /dev/null
+++ b/test/CodeGen/PowerPC/inline-asm-i-constraint-i1.ll
@@ -0,0 +1,14 @@
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
+
+; Make sure that boolean immediates are properly (zero) extended.
+; CHECK: TEST 42 + 1 - .
+
+target triple = "powerpc64le-unknown-linux-gnu"
+
+define i32 @foo() #0 {
+entry:
+  tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
+  ret i32 1
+}
+
+attributes #0 = { nounwind }

diff --git a/test/CodeGen/RISCV/inline-asm-i-constraint-i1.ll b/test/CodeGen/RISCV/inline-asm-i-constraint-i1.ll
new file mode 100644 (file)
index 0000000..fca1a18
--- /dev/null
+++ b/test/CodeGen/RISCV/inline-asm-i-constraint-i1.ll
@@ -0,0 +1,14 @@
+; RUN: llc -mtriple=riscv64-unknown-linux-gnu < %s | FileCheck %s
+
+; Make sure that boolean immediates are properly (zero) extended.
+; CHECK: TEST 42 + 1 - .
+
+target triple = "riscv64-unknown-linux-gnu"
+
+define i32 @foo() #0 {
+entry:
+  tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
+  ret i32 1
+}
+
+attributes #0 = { nounwind }

diff --git a/test/CodeGen/SPARC/inline-asm-i-constraint-i1.ll b/test/CodeGen/SPARC/inline-asm-i-constraint-i1.ll
new file mode 100644 (file)
index 0000000..d6d0eba
--- /dev/null
+++ b/test/CodeGen/SPARC/inline-asm-i-constraint-i1.ll
@@ -0,0 +1,14 @@
+; RUN: llc -mtriple=sparc64-unknown-linux-gnu < %s | FileCheck %s
+
+; Make sure that boolean immediates are properly (zero) extended.
+; CHECK: TEST 42 + 1 - .
+
+target triple = "sparc64-unknown-linux-gnu"
+
+define i32 @foo() #0 {
+entry:
+  tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
+  ret i32 1
+}
+
+attributes #0 = { nounwind }

diff --git a/test/CodeGen/SystemZ/inline-asm-i-constraint-i1.ll b/test/CodeGen/SystemZ/inline-asm-i-constraint-i1.ll
new file mode 100644 (file)
index 0000000..498dbee
--- /dev/null
+++ b/test/CodeGen/SystemZ/inline-asm-i-constraint-i1.ll
@@ -0,0 +1,14 @@
+; RUN: llc -mtriple=s390x-linux-gnu < %s | FileCheck %s
+
+; Make sure that boolean immediates are properly (zero) extended.
+; CHECK: TEST 42 + 1 - .
+
+target triple = "s390x-linux-gnu"
+
+define i32 @foo() #0 {
+entry:
+  tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
+  ret i32 1
+}
+
+attributes #0 = { nounwind }

diff --git a/test/CodeGen/Thumb/inline-asm-i-constraint-i1.ll b/test/CodeGen/Thumb/inline-asm-i-constraint-i1.ll
new file mode 100644 (file)
index 0000000..e6f1403
--- /dev/null
+++ b/test/CodeGen/Thumb/inline-asm-i-constraint-i1.ll
@@ -0,0 +1,14 @@
+; RUN: llc -mtriple=thumbv7-linux-gnueabi < %s | FileCheck %s
+
+; Make sure that boolean immediates are properly (zero) extended.
+; CHECK: TEST 42 + 1 - .
+
+target triple = "thumbv7-linux-gnueabi"
+
+define i32 @foo() #0 {
+entry:
+  tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
+  ret i32 1
+}
+
+attributes #0 = { nounwind }

diff --git a/test/CodeGen/Thumb2/inline-asm-i-constraint-i1.ll b/test/CodeGen/Thumb2/inline-asm-i-constraint-i1.ll
new file mode 100644 (file)
index 0000000..fb28915
--- /dev/null
+++ b/test/CodeGen/Thumb2/inline-asm-i-constraint-i1.ll
@@ -0,0 +1,14 @@
+; RUN: llc -mtriple=thumbv8-none-linux-gnueabi < %s | FileCheck %s
+
+; Make sure that boolean immediates are properly (zero) extended.
+; CHECK: TEST 42 + 1 - .
+
+target triple = "thumbv8-none-linux-gnueabi"
+
+define i32 @foo() #0 {
+entry:
+  tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0
+  ret i32 1
+}
+
+attributes #0 = { nounwind }