]> granicus.if.org Git - clang/commitdiff
[Clang][avx512][Builtin] Adding intrinsics for cvtw2mask{128|256|512} instruction set
authorMichael Zuckerman <Michael.zuckerman@intel.com>
Tue, 3 May 2016 14:12:23 +0000 (14:12 +0000)
committerMichael Zuckerman <Michael.zuckerman@intel.com>
Tue, 3 May 2016 14:12:23 +0000 (14:12 +0000)
Differential Revision: http://reviews.llvm.org/D19766

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@268385 91177308-0d34-0410-b5e6-96231b3b80d8

include/clang/Basic/BuiltinsX86.def
lib/Headers/avx512bwintrin.h
lib/Headers/avx512vlbwintrin.h
test/CodeGen/avx512bw-builtins.c
test/CodeGen/avx512vlbw-builtins.c

index 87c578efe6fe9997110b3b7f5ee6f30e6ee40d23..6379a118bcf33fe07376feefff2b5518d98dfd55 100644 (file)
@@ -2256,6 +2256,9 @@ TARGET_BUILTIN(__builtin_ia32_vcvtph2ps_mask, "V4fV8sV4fUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_vcvtph2ps256_mask, "V8fV8sV8fUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_vcvtps2ph_mask, "V8sV4fIiV8sUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_vcvtps2ph256_mask, "V8sV8fIiV8sUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_cvtw2mask512, "UiV32s","","avx512bw")
+TARGET_BUILTIN(__builtin_ia32_cvtw2mask128, "UcV8s","","avx512bw,avx512vl")
+TARGET_BUILTIN(__builtin_ia32_cvtw2mask256, "UsV16s","","avx512bw,avx512vl")
 
 #undef BUILTIN
 #undef TARGET_BUILTIN
index 59e64c12adfbdbfddb2bf83b167e182540a6a220..11a867ae7729641435250f3d3935101c4871f071 100644 (file)
@@ -2063,6 +2063,12 @@ _mm512_movepi8_mask (__m512i __A)
   return (__mmask64) __builtin_ia32_cvtb2mask512 ((__v64qi) __A);
 }
 
+static __inline__ __mmask32 __DEFAULT_FN_ATTRS
+_mm512_movepi16_mask (__m512i __A)
+{
+  return (__mmask32) __builtin_ia32_cvtw2mask512 ((__v32hi) __A);
+}
+
 static __inline__ __m512i __DEFAULT_FN_ATTRS
 _mm512_movm_epi8 (__mmask64 __A)
 {
index 86a206b8ee6b8aed2ab78549f0cdd2a7edcfdf13..d8e67fc15a571a4235c30eaa049b6d9651175f69 100644 (file)
@@ -3181,6 +3181,18 @@ _mm256_movepi8_mask (__m256i __A)
   return (__mmask32) __builtin_ia32_cvtb2mask256 ((__v32qi) __A);
 }
 
+static __inline__ __mmask8 __DEFAULT_FN_ATTRS
+_mm_movepi16_mask (__m128i __A)
+{
+  return (__mmask8) __builtin_ia32_cvtw2mask128 ((__v8hi) __A);
+}
+
+static __inline__ __mmask16 __DEFAULT_FN_ATTRS
+_mm256_movepi16_mask (__m256i __A)
+{
+  return (__mmask16) __builtin_ia32_cvtw2mask256 ((__v16hi) __A);
+}
+
 static __inline__ __m128i __DEFAULT_FN_ATTRS
 _mm_movm_epi8 (__mmask16 __A)
 {
index c701fd54bf09dcbca2b0388b30a34e2229a11955..3e0a80f7b69ab8593bd1ae7b2146340c0c731a8b 100644 (file)
@@ -1530,3 +1530,10 @@ __m512i test_mm512_sad_epu8(__m512i __A, __m512i __B) {
   // CHECK: @llvm.x86.avx512.psad.bw.512
   return _mm512_sad_epu8(__A, __B); 
 }
+
+__mmask32 test_mm512_movepi16_mask(__m512i __A) {
+  // CHECK-LABEL: @test_mm512_movepi16_mask
+  // CHECK: @llvm.x86.avx512.cvtw2mask.512
+  return _mm512_movepi16_mask(__A); 
+}
+
index 69906fd7da76df9f86346b55e395a1ea7f588905..8ed52ab12895ea1e61d5104b01b29e5e7011f4da 100644 (file)
@@ -2375,3 +2375,15 @@ __m256i test_mm256_maskz_dbsad_epu8(__mmask16 __U, __m256i __A, __m256i __B) {
   // CHECK: @llvm.x86.avx512.mask.dbpsadbw.256
   return _mm256_maskz_dbsad_epu8(__U, __A, __B, 170); 
 }
+__mmask8 test_mm_movepi16_mask(__m128i __A) {
+  // CHECK-LABEL: @test_mm_movepi16_mask
+  // CHECK: @llvm.x86.avx512.cvtw2mask.128
+  return _mm_movepi16_mask(__A); 
+}
+
+__mmask16 test_mm256_movepi16_mask(__m256i __A) {
+  // CHECK-LABEL: @test_mm256_movepi16_mask
+  // CHECK: @llvm.x86.avx512.cvtw2mask.256
+  return _mm256_movepi16_mask(__A); 
+}
+