[InstCombine] Add tests to show missed opportunities to combine bit tests hidden...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311784 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/Transforms/InstCombine/bit-checks.ll b/test/Transforms/InstCombine/bit-checks.ll
index a765e3bb8e24d1ef6eb38a01929948a7657b0182..3be67690431aea519e20a99a9f0c5cd3e715c982 100644 (file)
--- a/test/Transforms/InstCombine/bit-checks.ll
+++ b/test/Transforms/InstCombine/bit-checks.ll
@@ -517,3 +517,155 @@ define i32 @main7g(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %argc5) {
   %storemerge = select i1 %and.cond, i32 0, i32 1
   ret i32 %storemerge
 }
+
+define i32 @main8(i32 %argc) {
+; CHECK-LABEL: @main8(
+; CHECK-NEXT:    [[AND:%.*]] = and i32 [[ARGC:%.*]], 64
+; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT:    [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT:    [[TOBOOL3:%.*]] = icmp slt i8 [[TRUNC2]], 0
+; CHECK-NEXT:    [[OR_COND:%.*]] = or i1 [[TOBOOL]], [[TOBOOL3]]
+; CHECK-NEXT:    [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
+; CHECK-NEXT:    ret i32 [[RETVAL_0]]
+;
+  %and = and i32 %argc, 64
+  %tobool = icmp ne i32 %and, 0
+  %trunc2 = trunc i32 %argc to i8
+  %tobool3 = icmp slt i8 %trunc2, 0
+  %or.cond = or i1 %tobool, %tobool3
+  %retval.0 = select i1 %or.cond, i32 2, i32 1
+  ret i32 %retval.0
+}
+
+define i32 @main9(i32 %argc) {
+; CHECK-LABEL: @main9(
+; CHECK-NEXT:    [[AND:%.*]] = and i32 [[ARGC:%.*]], 64
+; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT:    [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT:    [[TOBOOL3:%.*]] = icmp slt i8 [[TRUNC2]], 0
+; CHECK-NEXT:    [[OR_COND:%.*]] = and i1 [[TOBOOL]], [[TOBOOL3]]
+; CHECK-NEXT:    [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
+; CHECK-NEXT:    ret i32 [[RETVAL_0]]
+;
+  %and = and i32 %argc, 64
+  %tobool = icmp ne i32 %and, 0
+  %trunc2 = trunc i32 %argc to i8
+  %tobool3 = icmp slt i8 %trunc2, 0
+  %or.cond = and i1 %tobool, %tobool3
+  %retval.0 = select i1 %or.cond, i32 2, i32 1
+  ret i32 %retval.0
+}
+
+define i32 @main10(i32 %argc) {
+; CHECK-LABEL: @main10(
+; CHECK-NEXT:    [[AND:%.*]] = and i32 [[ARGC:%.*]], 64
+; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT:    [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT:    [[TOBOOL3:%.*]] = icmp sgt i8 [[TRUNC2]], -1
+; CHECK-NEXT:    [[OR_COND:%.*]] = and i1 [[TOBOOL]], [[TOBOOL3]]
+; CHECK-NEXT:    [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
+; CHECK-NEXT:    ret i32 [[RETVAL_0]]
+;
+  %and = and i32 %argc, 64
+  %tobool = icmp eq i32 %and, 0
+  %trunc2 = trunc i32 %argc to i8
+  %tobool3 = icmp sge i8 %trunc2, 0
+  %or.cond = and i1 %tobool, %tobool3
+  %retval.0 = select i1 %or.cond, i32 2, i32 1
+  ret i32 %retval.0
+}
+
+define i32 @main11(i32 %argc) {
+; CHECK-LABEL: @main11(
+; CHECK-NEXT:    [[AND:%.*]] = and i32 [[ARGC:%.*]], 64
+; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT:    [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT:    [[TOBOOL3:%.*]] = icmp sgt i8 [[TRUNC2]], -1
+; CHECK-NEXT:    [[OR_COND:%.*]] = or i1 [[TOBOOL]], [[TOBOOL3]]
+; CHECK-NEXT:    [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
+; CHECK-NEXT:    ret i32 [[RETVAL_0]]
+;
+  %and = and i32 %argc, 64
+  %tobool = icmp eq i32 %and, 0
+  %trunc2 = trunc i32 %argc to i8
+  %tobool3 = icmp sge i8 %trunc2, 0
+  %or.cond = or i1 %tobool, %tobool3
+  %retval.0 = select i1 %or.cond, i32 2, i32 1
+  ret i32 %retval.0
+}
+
+define i32 @main12(i32 %argc) {
+; CHECK-LABEL: @main12(
+; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i32 [[ARGC:%.*]] to i16
+; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp slt i16 [[TRUNC]], 0
+; CHECK-NEXT:    [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT:    [[TOBOOL3:%.*]] = icmp slt i8 [[TRUNC2]], 0
+; CHECK-NEXT:    [[OR_COND:%.*]] = or i1 [[TOBOOL]], [[TOBOOL3]]
+; CHECK-NEXT:    [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
+; CHECK-NEXT:    ret i32 [[RETVAL_0]]
+;
+  %trunc = trunc i32 %argc to i16
+  %tobool = icmp slt i16 %trunc, 0
+  %trunc2 = trunc i32 %argc to i8
+  %tobool3 = icmp slt i8 %trunc2, 0
+  %or.cond = or i1 %tobool, %tobool3
+  %retval.0 = select i1 %or.cond, i32 2, i32 1
+  ret i32 %retval.0
+}
+
+define i32 @main13(i32 %argc) {
+; CHECK-LABEL: @main13(
+; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i32 [[ARGC:%.*]] to i16
+; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp slt i16 [[TRUNC]], 0
+; CHECK-NEXT:    [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT:    [[TOBOOL3:%.*]] = icmp slt i8 [[TRUNC2]], 0
+; CHECK-NEXT:    [[OR_COND:%.*]] = and i1 [[TOBOOL]], [[TOBOOL3]]
+; CHECK-NEXT:    [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
+; CHECK-NEXT:    ret i32 [[RETVAL_0]]
+;
+  %trunc = trunc i32 %argc to i16
+  %tobool = icmp slt i16 %trunc, 0
+  %trunc2 = trunc i32 %argc to i8
+  %tobool3 = icmp slt i8 %trunc2, 0
+  %or.cond = and i1 %tobool, %tobool3
+  %retval.0 = select i1 %or.cond, i32 2, i32 1
+  ret i32 %retval.0
+}
+
+define i32 @main14(i32 %argc) {
+; CHECK-LABEL: @main14(
+; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i32 [[ARGC:%.*]] to i16
+; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp sgt i16 [[TRUNC]], -1
+; CHECK-NEXT:    [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT:    [[TOBOOL3:%.*]] = icmp sgt i8 [[TRUNC2]], -1
+; CHECK-NEXT:    [[OR_COND:%.*]] = and i1 [[TOBOOL]], [[TOBOOL3]]
+; CHECK-NEXT:    [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
+; CHECK-NEXT:    ret i32 [[RETVAL_0]]
+;
+  %trunc = trunc i32 %argc to i16
+  %tobool = icmp sge i16 %trunc, 0
+  %trunc2 = trunc i32 %argc to i8
+  %tobool3 = icmp sge i8 %trunc2, 0
+  %or.cond = and i1 %tobool, %tobool3
+  %retval.0 = select i1 %or.cond, i32 2, i32 1
+  ret i32 %retval.0
+}
+
+define i32 @main15(i32 %argc) {
+; CHECK-LABEL: @main15(
+; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i32 [[ARGC:%.*]] to i16
+; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp sgt i16 [[TRUNC]], -1
+; CHECK-NEXT:    [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT:    [[TOBOOL3:%.*]] = icmp sgt i8 [[TRUNC2]], -1
+; CHECK-NEXT:    [[OR_COND:%.*]] = or i1 [[TOBOOL]], [[TOBOOL3]]
+; CHECK-NEXT:    [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
+; CHECK-NEXT:    ret i32 [[RETVAL_0]]
+;
+  %trunc = trunc i32 %argc to i16
+  %tobool = icmp sge i16 %trunc, 0
+  %trunc2 = trunc i32 %argc to i8
+  %tobool3 = icmp sge i8 %trunc2, 0
+  %or.cond = or i1 %tobool, %tobool3
+  %retval.0 = select i1 %or.cond, i32 2, i32 1
+  ret i32 %retval.0
+}