]> granicus.if.org Git - llvm/commitdiff
[X86] Silence unused variable warning in Release builds.
authorBenjamin Kramer <benny.kra@googlemail.com>
Tue, 31 Jan 2017 14:13:53 +0000 (14:13 +0000)
committerBenjamin Kramer <benny.kra@googlemail.com>
Tue, 31 Jan 2017 14:13:53 +0000 (14:13 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293631 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

index f1d6c70401755daaac23d4832c9d80693406ea65..8bbe21c9b3aecfd822a1900ecfb7051eb8eef72e 100644 (file)
@@ -30610,10 +30610,11 @@ static SDValue combineVectorShift(SDNode *N, SelectionDAG &DAG,
 static SDValue combineVectorInsert(SDNode *N, SelectionDAG &DAG,
                                    TargetLowering::DAGCombinerInfo &DCI,
                                    const X86Subtarget &Subtarget) {
-  unsigned Opcode = N->getOpcode();
-  assert(((X86ISD::PINSRB == Opcode && N->getValueType(0) ==MVT::v16i8) ||
-          (X86ISD::PINSRW == Opcode && N->getValueType(0) ==MVT::v8i16)) &&
-         "Unexpected vector insertion");
+  assert(
+      ((N->getOpcode() == X86ISD::PINSRB && N->getValueType(0) == MVT::v16i8) ||
+       (N->getOpcode() == X86ISD::PINSRW &&
+        N->getValueType(0) == MVT::v8i16)) &&
+      "Unexpected vector insertion");
 
   // Attempt to combine PINSRB/PINSRW patterns to a shuffle.
   SDValue Op(N, 0);