]> granicus.if.org Git - llvm/commitdiff
[AArch64][Outliner] Don't outline BTI instructions
authorOliver Stannard <oliver.stannard@arm.com>
Tue, 5 Feb 2019 17:21:57 +0000 (17:21 +0000)
committerOliver Stannard <oliver.stannard@arm.com>
Tue, 5 Feb 2019 17:21:57 +0000 (17:21 +0000)
We can't outline BTI instructions, because they need to be the very first
instruction executed after an indirect call or branch. If we outline them, then
an indirect call might go to the branch to the outlined function, which will
fault.

Differential revision: https://reviews.llvm.org/D57753

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353190 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AArch64/AArch64InstrInfo.cpp
test/CodeGen/AArch64/machine-outliner-outline-bti.ll [new file with mode: 0644]

index 4996f1c17646c4713a84bf4b83323a80e892bb82..e2018ab7578ef5b6824dca67cd7444bd5b9cdfc2 100644 (file)
@@ -5330,6 +5330,14 @@ AArch64InstrInfo::getOutliningType(MachineBasicBlock::iterator &MIT,
       MI.modifiesRegister(AArch64::W30, &getRegisterInfo()))
     return outliner::InstrType::Illegal;
 
+  // Don't outline BTI instructions, because that will prevent the outlining
+  // site from being indirectly callable.
+  if (MI.getOpcode() == AArch64::HINT) {
+    int64_t Imm = MI.getOperand(0).getImm();
+    if (Imm == 32 || Imm == 34 || Imm == 36 || Imm == 38)
+      return outliner::InstrType::Illegal;
+  }
+
   return outliner::InstrType::Legal;
 }
 
diff --git a/test/CodeGen/AArch64/machine-outliner-outline-bti.ll b/test/CodeGen/AArch64/machine-outliner-outline-bti.ll
new file mode 100644 (file)
index 0000000..bc1521c
--- /dev/null
@@ -0,0 +1,22 @@
+; RUN: llc -mtriple aarch64--none-eabi < %s | FileCheck %s
+
+; The BTI instruction cannot be outlined, because it needs to be the very first
+; instruction executed after an indirect call.
+
+@g = hidden global i32 0, align 4
+
+define hidden void @foo() minsize "branch-target-enforcement" {
+entry:
+; CHECK: hint #34
+; CHECK: b       OUTLINED_FUNCTION_0
+  store volatile i32 1, i32* @g, align 4
+  ret void
+}
+
+define hidden void @bar() minsize "branch-target-enforcement" {
+entry:
+; CHECK: hint #34
+; CHECK: b       OUTLINED_FUNCTION_0
+  store volatile i32 1, i32* @g, align 4
+  ret void
+}