Builder.defineMacro("__ASSEMBLER__");
if (LangOpts.CUDA && !LangOpts.HIP)
Builder.defineMacro("__CUDA__");
- if (LangOpts.HIP)
+ if (LangOpts.HIP) {
Builder.defineMacro("__HIP__");
+ Builder.defineMacro("__HIPCC__");
+ if (LangOpts.CUDAIsDevice)
+ Builder.defineMacro("__HIP_DEVICE_COMPILE__");
+ }
}
/// Initialize the predefined C++ language feature test macros defined in
}
// CUDA device path compilaton
- if (LangOpts.CUDAIsDevice) {
+ if (LangOpts.CUDAIsDevice && !LangOpts.HIP) {
// The CUDA_ARCH value is set for the GPU target specified in the NVPTX
// backend's target defines.
Builder.defineMacro("__CUDA_ARCH__");
// RUN: %clang_cc1 %s -E -dM -o - -x cl -triple spir-unknown-unknown \
// RUN: | FileCheck -match-full-lines %s --check-prefix=CHECK-SPIR
// CHECK-SPIR: #define __IMAGE_SUPPORT__ 1
+
+// RUN: %clang_cc1 %s -E -dM -o - -x hip -triple amdgcn-amd-amdhsa \
+// RUN: | FileCheck -match-full-lines %s --check-prefix=CHECK-HIP
+// CHECK-HIP-NOT: #define __CUDA_ARCH__
+// CHECK-HIP: #define __HIPCC__ 1
+// CHECK-HIP-NOT: #define __HIP_DEVICE_COMPILE__ 1
+// CHECK-HIP: #define __HIP__ 1
+
+// RUN: %clang_cc1 %s -E -dM -o - -x hip -triple amdgcn-amd-amdhsa \
+// RUN: -fcuda-is-device \
+// RUN: | FileCheck -match-full-lines %s --check-prefix=CHECK-HIP-DEV
+// CHECK-HIP-DEV-NOT: #define __CUDA_ARCH__
+// CHECK-HIP-DEV: #define __HIPCC__ 1
+// CHECK-HIP-DEV: #define __HIP_DEVICE_COMPILE__ 1
+// CHECK-HIP-DEV: #define __HIP__ 1