InstCombine: Propagate exact for (sdiv X, Pow2) -> (udiv X, Pow2)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222625 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index 216177ff2b42616d838d72d330abc65f1b4c56f5..d7847ca5ccdfefd83e9c750a270517b772ed3b96 100644 (file)
--- a/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -1102,12 +1102,14 @@ Instruction *InstCombiner::visitSDiv(BinaryOperator &I) {
         return BO;
       }
 
-      if (match(Op1, m_Shl(m_Power2(), m_Value()))) {
+      if (isKnownToBeAPowerOfTwo(Op1, /*OrZero*/true, 0, AT, &I, DT)) {
         // X sdiv (1 << Y) -> X udiv (1 << Y) ( -> X u>> Y)
         // Safe because the only negative value (1 << Y) can take on is
         // INT_MIN, and X sdiv INT_MIN == X udiv INT_MIN == 0 if X doesn't have
         // the sign bit set.
-        return BinaryOperator::CreateUDiv(Op0, Op1, I.getName());
+        auto *BO = BinaryOperator::CreateUDiv(Op0, Op1, I.getName());
+        BO->setIsExact(I.isExact());
+        return BO;
       }
     }
   }

diff --git a/test/Transforms/InstCombine/div.ll b/test/Transforms/InstCombine/div.ll
index cfe346e1f2b2ffdc44260015e367d6df0d92a6e9..e0ff07baae7cc3635889b9c183785070c62ee8e6 100644 (file)
--- a/test/Transforms/InstCombine/div.ll
+++ b/test/Transforms/InstCombine/div.ll
@@ -314,3 +314,14 @@ define i32 @test35(i32 %A) {
 ; CHECK-NEXT: %[[udiv:.*]] = udiv exact i32 %[[and]], 2147483647
 ; CHECK-NEXT: ret i32 %[[udiv]]
 }
+
+define i32 @test36(i32 %A) {
+  %and = and i32 %A, 2147483647
+  %shl = shl nsw i32 1, %A
+  %mul = sdiv exact i32 %and, %shl
+  ret i32 %mul
+; CHECK-LABEL: @test36(
+; CHECK-NEXT: %[[and:.*]] = and i32 %A, 2147483647
+; CHECK-NEXT: %[[shr:.*]] = lshr exact i32 %[[and]], %A
+; CHECK-NEXT: ret i32 %[[shr]]
+}