"Unexpected type in LowerBUILD_VECTORvXi1!");
SDLoc dl(Op);
- if (ISD::isBuildVectorAllZeros(Op.getNode()))
- return Op;
-
- if (ISD::isBuildVectorAllOnes(Op.getNode()))
+ if (ISD::isBuildVectorAllZeros(Op.getNode()) ||
+ ISD::isBuildVectorAllOnes(Op.getNode()))
return Op;
- if (ISD::isBuildVectorOfConstantSDNodes(Op.getNode())) {
- if (VT == MVT::v64i1 && !Subtarget.is64Bit()) {
- // Split the pieces.
- SDValue Lower =
- DAG.getBuildVector(MVT::v32i1, dl, Op.getNode()->ops().slice(0, 32));
- SDValue Upper =
- DAG.getBuildVector(MVT::v32i1, dl, Op.getNode()->ops().slice(32, 32));
- // We have to manually lower both halves so getNode doesn't try to
- // reassemble the build_vector.
- Lower = LowerBUILD_VECTORvXi1(Lower, DAG, Subtarget);
- Upper = LowerBUILD_VECTORvXi1(Upper, DAG, Subtarget);
- return DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v64i1, Lower, Upper);
- }
- SDValue Imm = ConvertI1VectorToInteger(Op, DAG);
- if (Imm.getValueSizeInBits() == VT.getSizeInBits())
- return DAG.getBitcast(VT, Imm);
- SDValue ExtVec = DAG.getBitcast(MVT::v8i1, Imm);
- return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, ExtVec,
- DAG.getIntPtrConstant(0, dl));
- }
-
- // Vector has one or more non-const elements
uint64_t Immediate = 0;
SmallVector<unsigned, 16> NonConstIdx;
bool IsSplat = true;