[AArch64] Add FeatureSlowMisaligned128Store to Exynos M1 and M2

This feature now gates such stores after r289845.  Thus the Exynos
processors now need this feature.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289898 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AArch64.td b/lib/Target/AArch64/AArch64.td
index 7c90695419f741bd7d84787437dad925028cea01..c40391d5ad9d0cd276d874f6ce8349b6af9fce93 100644 (file)
--- a/lib/Target/AArch64/AArch64.td
+++ b/lib/Target/AArch64/AArch64.td
@@ -230,6 +230,7 @@ def ProcExynosM1 : SubtargetFeature<"exynosm1", "ARMProcFamily", "ExynosM1",
                                      FeatureNEON,
                                      FeaturePerfMon,
                                      FeaturePostRAScheduler,
+                                     FeatureSlowMisaligned128Store,
                                      FeatureUseRSqrt,
                                      FeatureZCZeroing]>;
 
@@ -243,6 +244,7 @@ def ProcExynosM2 : SubtargetFeature<"exynosm2", "ARMProcFamily", "ExynosM1",
                                      FeatureNEON,
                                      FeaturePerfMon,
                                      FeaturePostRAScheduler,
+                                     FeatureSlowMisaligned128Store,
                                      FeatureZCZeroing]>;
 
 def ProcKryo    : SubtargetFeature<"kryo", "ARMProcFamily", "Kryo",