The cache size could be off by 4, if we're on a 32-bit system and
the slot had to be bumped for alignment reasons.
I wasn't able to reproduce the issue reported in bug #77287, but I
think this might be the cause.
zval *val = &op_array->literals[opline->op2.constant];
if (Z_TYPE_P(val) == IS_CONSTANT_AST) {
- uint32_t slot = ZEND_MM_ALIGNED_SIZE_EX(op_array->cache_size, 8);
-
- Z_CACHE_SLOT_P(val) = slot;
+ /* Ensure zval is aligned to 8 bytes */
+ op_array->cache_size = ZEND_MM_ALIGNED_SIZE_EX(op_array->cache_size, 8);
+ Z_CACHE_SLOT_P(val) = op_array->cache_size;
op_array->cache_size += sizeof(zval);
}
} else if (opline->opcode != ZEND_RECV) {