EXTRA_DIST += modules/arch/x86/tests/riprel2.asm
EXTRA_DIST += modules/arch/x86/tests/riprel2.errwarn
EXTRA_DIST += modules/arch/x86/tests/riprel2.hex
+EXTRA_DIST += modules/arch/x86/tests/ripseg.asm
+EXTRA_DIST += modules/arch/x86/tests/ripseg.errwarn
+EXTRA_DIST += modules/arch/x86/tests/ripseg.hex
EXTRA_DIST += modules/arch/x86/tests/segmov.asm
EXTRA_DIST += modules/arch/x86/tests/segmov.hex
EXTRA_DIST += modules/arch/x86/tests/shift.asm
mov rax,[abs dword foo]
mov rax,[abs qword foo]
- ; all of these are abs due to es:, except for explicit rel
+ ; all of these are default rel, except for 64-bit displacements
mov rax,[es:foo]
mov rax,[qword es:123456789abcdef0h]
mov rbx,[es:foo]
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
48
a1
-c4
+c0
02
00
00
48
8b
05
-89
+85
02
00
00
48
8b
1d
-82
+7e
02
00
00
48
8b
05
-7b
+77
02
00
00
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
48
a1
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
26
48
a1
-c4
+c0
02
00
00
48
8b
05
-17
+13
02
00
00
48
8b
1d
-0f
+0b
02
00
00
48
8b
05
-07
+03
02
00
00
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
26
48
a1
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
64
48
a1
-c4
+c0
02
00
00
48
8b
05
-9f
+9b
01
00
00
48
8b
1d
-97
+93
01
00
00
48
8b
05
-8f
+8b
01
00
00
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
64
48
a1
-c4
+c0
02
00
00
48
8b
05
-59
+55
01
00
00
48
8b
1d
-48
+44
01
00
00
48
8b
05
-41
+3d
01
00
00
48
8b
1d
-3a
+36
01
00
00
48
a1
-c4
+c0
02
00
00
48
8b
05
-29
+25
01
00
00
48
8b
1d
-22
+1e
01
00
00
48
8b
05
-1b
+17
01
00
00
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
48
a1
-c4
+c0
02
00
00
26
48
8b
-04
-25
-c4
-02
+05
+ed
+00
00
00
26
26
48
8b
-1c
-25
-c4
-02
+1d
+da
+00
00
00
26
48
8b
-04
-25
-c4
-02
+05
+d2
+00
00
00
26
48
8b
-1c
-25
-c4
-02
+1d
+ca
+00
00
00
26
48
a1
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
26
48
a1
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
64
48
a1
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
8b
1c
25
-c4
+c0
02
00
00
8b
04
25
-c4
+c0
02
00
00
64
48
a1
-c4
+c0
02
00
00
--- /dev/null
+bits 64
+foo:
+
+default abs
+mov rbx, [foo]
+mov rbx, [es:foo]
+mov rbx, [fs:foo]
+mov rbx, [gs:foo]
+mov rbx, [rel es:foo]
+mov rbx, [rel fs:foo]
+mov rbx, [rel gs:foo]
+mov rbx, [abs es:foo]
+mov rbx, [abs fs:foo]
+mov rbx, [abs gs:foo]
+;mov rbx, [es:rel foo]
+;mov rbx, [fs:rel foo]
+;mov rbx, [es:abs foo]
+;mov rbx, [fs:abs foo]
+
+default rel
+mov rbx, [foo]
+mov rbx, [es:foo]
+mov rbx, [fs:foo]
+mov rbx, [gs:foo]
+mov rbx, [rel es:foo]
+mov rbx, [rel fs:foo]
+mov rbx, [rel gs:foo]
+mov rbx, [abs es:foo]
+mov rbx, [abs fs:foo]
+mov rbx, [abs gs:foo]
+;mov rbx, [es:rel foo]
+;mov rbx, [fs:rel foo]
+;mov rbx, [es:abs foo]
+;mov rbx, [fs:abs foo]
+
--- /dev/null
+-:6: warning: `es' segment register ignored in 64-bit mode
+-:9: warning: `es' segment register ignored in 64-bit mode
+-:12: warning: `es' segment register ignored in 64-bit mode
+-:22: warning: `es' segment register ignored in 64-bit mode
+-:25: warning: `es' segment register ignored in 64-bit mode
+-:28: warning: `es' segment register ignored in 64-bit mode
--- /dev/null
+48
+8b
+1c
+25
+00
+00
+00
+00
+26
+48
+8b
+1c
+25
+00
+00
+00
+00
+64
+48
+8b
+1c
+25
+00
+00
+00
+00
+65
+48
+8b
+1c
+25
+00
+00
+00
+00
+26
+48
+8b
+1d
+d5
+ff
+ff
+ff
+64
+48
+8b
+1d
+cd
+ff
+ff
+ff
+65
+48
+8b
+1d
+c5
+ff
+ff
+ff
+26
+48
+8b
+1c
+25
+00
+00
+00
+00
+64
+48
+8b
+1c
+25
+00
+00
+00
+00
+65
+48
+8b
+1c
+25
+00
+00
+00
+00
+48
+8b
+1d
+a3
+ff
+ff
+ff
+26
+48
+8b
+1d
+9b
+ff
+ff
+ff
+64
+48
+8b
+1c
+25
+00
+00
+00
+00
+65
+48
+8b
+1c
+25
+00
+00
+00
+00
+26
+48
+8b
+1d
+81
+ff
+ff
+ff
+64
+48
+8b
+1d
+79
+ff
+ff
+ff
+65
+48
+8b
+1d
+71
+ff
+ff
+ff
+26
+48
+8b
+1c
+25
+00
+00
+00
+00
+64
+48
+8b
+1c
+25
+00
+00
+00
+00
+65
+48
+8b
+1c
+25
+00
+00
+00
+00
yasm_x86__ea_set_disponly(insn->x86_ea);
else if (id_insn->default_rel &&
!op->data.ea->not_pc_rel &&
- op->data.ea->segreg == 0 &&
+ op->data.ea->segreg != 0x6404 &&
+ op->data.ea->segreg != 0x6505 &&
!yasm_expr__contains(
op->data.ea->disp.abs, YASM_EXPR_REG))
- /* Enable default PC-rel if no regs/segregs */
+ /* Enable default PC-rel if no regs and segreg
+ * is not FS or GS.
+ */
insn->x86_ea->ea.pc_rel = 1;
break;
case YASM_INSN__OPERAND_IMM:
}
get_next_token();
ea = parse_memaddr(parser_nasm);
- if (ea) {
+ if (ea)
yasm_ea_set_segreg(ea, segreg);
- ea->pc_rel = 0;
- ea->not_pc_rel = 1;
- }
return ea;
}
case SIZE_OVERRIDE: