Avoid failed include when Makefile is processed with no target.

Basically just a warning, but disconcerting nonetheless. Removes this
output from the build:
Makefile:59: -x86_64-darwin13-gcc.mk: No such file or directory

Change-Id: Ibb379506352b2f613ef4a7b1ac47e9c95d0d1580

diff --git a/build/make/Makefile b/build/make/Makefile
index 71d33bde64ea1d1e68eb5a71456ac667a7a3331b..a16f41c2f58a2ce2bcdca401f3597b653050fea5 100644 (file)
--- a/build/make/Makefile
+++ b/build/make/Makefile
@@ -56,7 +56,11 @@ dist:
         fi
 endif
 
+# Since we invoke make recursively for multiple targets we need to include the
+# .mk file for the correct target, but only when $(target) is non-empty.
+ifneq ($(target),)
 include $(target)-$(TOOLCHAIN).mk
+endif
 BUILD_ROOT?=.
 VPATH=$(SRC_PATH_BARE)
 CFLAGS+=-I$(BUILD_PFX)$(BUILD_ROOT) -I$(SRC_PATH)