]> granicus.if.org Git - llvm/commitdiff
Merging r233904:
authorDaniel Sanders <daniel.sanders@imgtec.com>
Mon, 27 Apr 2015 14:31:46 +0000 (14:31 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Mon, 27 Apr 2015 14:31:46 +0000 (14:31 +0000)
------------------------------------------------------------------------
r233904 | vkalintiris | 2015-04-02 11:14:54 +0100 (Thu, 02 Apr 2015) | 9 lines

[mips] Make sure that we don't adjust the stack pointer by zero amount.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8638
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@235883 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/Mips16InstrInfo.cpp
lib/Target/Mips/MipsSEInstrInfo.cpp
test/CodeGen/Mips/adjust-callstack-sp.ll [new file with mode: 0644]

index 976beccfed9d17a8e2c049905f99cc3176c0c438..7e1fbfdcac46dbf7a2b79e63318f3474646d4eaf 100644 (file)
@@ -293,6 +293,9 @@ void Mips16InstrInfo::adjustStackPtrBigUnrestricted(
 void Mips16InstrInfo::adjustStackPtr(unsigned SP, int64_t Amount,
                                      MachineBasicBlock &MBB,
                                      MachineBasicBlock::iterator I) const {
+  if (Amount == 0)
+    return;
+
   if (isInt<16>(Amount))  // need to change to addiu sp, ....and isInt<16>
     BuildAddiuSpImm(MBB, I, Amount);
   else
index 74f291f609fda238ccc80bd632ccc913e31d7719..180b04327fc9bb4d19248471f5ab7540557cbb62 100644 (file)
@@ -364,6 +364,9 @@ void MipsSEInstrInfo::adjustStackPtr(unsigned SP, int64_t Amount,
   unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu;
   unsigned ADDiu = STI.isABI_N64() ? Mips::DADDiu : Mips::ADDiu;
 
+  if (Amount == 0)
+    return;
+
   if (isInt<16>(Amount))// addi sp, sp, amount
     BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount);
   else { // Expand immediate that doesn't fit in 16-bit.
diff --git a/test/CodeGen/Mips/adjust-callstack-sp.ll b/test/CodeGen/Mips/adjust-callstack-sp.ll
new file mode 100644 (file)
index 0000000..8c61a65
--- /dev/null
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=mips -mcpu=mips16 | FileCheck %s -check-prefix=M16
+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s -check-prefix=GP32
+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s -check-prefix=GP32
+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s -check-prefix=GP32
+; RUN: llc < %s -march=mips -mcpu=mips3 | FileCheck %s -check-prefix=GP64
+; RUN: llc < %s -march=mips -mcpu=mips64 | FileCheck %s -check-prefix=GP64
+; RUN: llc < %s -march=mips -mcpu=mips64r6 | FileCheck %s -check-prefix=GP64
+
+declare void @bar(i32*)
+
+define void @foo(i32 %sz) {
+  ; ALL-LABEL: foo:
+
+    ; M16-NOT:        addiu     $sp, 0 # 16 bit inst
+    ; GP32-NOT:       addiu     $sp, $sp, 0
+    ; GP64-NOT:       daddiu    $sp, $sp, 0
+  %a = alloca i32, i32 %sz
+  call void @bar(i32* %a)
+  ret void
+}