MVT SVT = VecVT.getSimpleVT();
uint64_t W = CW->getZExtValue();
- if (W == 32) {
+ if (W == 1) {
+ MVT LocVT = MVT::getIntegerVT(SVT.getSizeInBits());
+ SDValue VecCast = DAG.getNode(ISD::BITCAST, dl, LocVT, Vec);
+ SDValue Shifted = DAG.getNode(ISD::SRA, dl, LocVT, VecCast, Offset);
+ return DAG.getNode(ISD::AND, dl, LocVT, Shifted,
+ DAG.getConstant(1, dl, LocVT));
+ } else if (W == 32) {
// Translate this node into EXTRACT_SUBREG.
unsigned Subreg = (X == 0) ? Hexagon::isub_lo : 0;
--- /dev/null
+; RUN: llc -march=hexagon < %s
+
+define i1 @t_i4x8(<4 x i8> %a, <4 x i8> %b) nounwind {
+entry:
+ %0 = add <4 x i8> %a, %b
+ %1 = bitcast <4 x i8> %0 to <32 x i1>
+ %2 = extractelement <32 x i1> %1, i32 0
+ ret i1 %2
+}