[TargetLowering] SimplifyMultipleUseDemandedBits - don't assume INSERT_VECTOR_ELT...

Noticed by inspection - this was copied from the X86 target equivalent where we can assume its legal/simple.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367721 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 89181fee2576d662ad560de0fc5b9a25fbcaafc4..dd819eb7e2d3a79a0ebdf69a7e58457c2600db84 100644 (file)
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -680,7 +680,7 @@ SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
     // If we don't demand the inserted element, return the base vector.
     SDValue Vec = Op.getOperand(0);
     auto *CIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
-    MVT VecVT = Vec.getSimpleValueType();
+    EVT VecVT = Vec.getValueType();
     if (CIdx && CIdx->getAPIntValue().ult(VecVT.getVectorNumElements()) &&
         !DemandedElts[CIdx->getZExtValue()])
       return Vec;