[ARM][Asm] Accept upper case coprocessor number and registers

Differential revision: https://reviews.llvm.org/D59760

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356984 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index c3779233870e2941b14975ff225c198735115740..15656353eb21868bfb32ce482fa7308ae752ad33 100644 (file)
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -3661,7 +3661,7 @@ ARMAsmParser::parseCoprocNumOperand(OperandVector &Operands) {
   if (Tok.isNot(AsmToken::Identifier))
     return MatchOperand_NoMatch;
 
-  int Num = MatchCoprocessorOperandName(Tok.getString(), 'p');
+  int Num = MatchCoprocessorOperandName(Tok.getString().lower(), 'p');
   if (Num == -1)
     return MatchOperand_NoMatch;
   // ARMv7 and v8 don't allow cp10/cp11 due to VFP/NEON specific instructions
@@ -3684,7 +3684,7 @@ ARMAsmParser::parseCoprocRegOperand(OperandVector &Operands) {
   if (Tok.isNot(AsmToken::Identifier))
     return MatchOperand_NoMatch;
 
-  int Reg = MatchCoprocessorOperandName(Tok.getString(), 'c');
+  int Reg = MatchCoprocessorOperandName(Tok.getString().lower(), 'c');
   if (Reg == -1)
     return MatchOperand_NoMatch;
 

diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s
index e58f2926c20c3b507c8b0378d9bc0148d61fb540..055f3ce316153d087882c91db8365e80d5bae286 100644 (file)
--- a/test/MC/ARM/basic-arm-instructions.s
+++ b/test/MC/ARM/basic-arm-instructions.s
@@ -1244,11 +1244,17 @@ Lforward:
 @------------------------------------------------------------------------------
         mcr  p7, #1, r5, c1, c1, #4
         mcr2  p7, #1, r5, c1, c1, #4
+        MCR  P7, #1, R5, C1, C1, #4
+        MCR2  P7, #1, R5, C1, C1, #4
 
+@ CHECK: mcr  p7, #1, r5, c1, c1, #4    @ encoding: [0x91,0x57,0x21,0xee]
+@ CHECK: mcr2  p7, #1, r5, c1, c1, #4   @ encoding: [0x91,0x57,0x21,0xfe]
 @ CHECK: mcr  p7, #1, r5, c1, c1, #4    @ encoding: [0x91,0x57,0x21,0xee]
 @ CHECK: mcr2  p7, #1, r5, c1, c1, #4   @ encoding: [0x91,0x57,0x21,0xfe]
 
         mcrls  p7, #1, r5, c1, c1, #4
+        MCRLS  P7, #1, R5, C1, C1, #4
+@ CHECK: mcrls  p7, #1, r5, c1, c1, #4   @ encoding: [0x91,0x57,0x21,0x9e]
 @ CHECK: mcrls  p7, #1, r5, c1, c1, #4   @ encoding: [0x91,0x57,0x21,0x9e]
 
 @------------------------------------------------------------------------------
@@ -1256,11 +1262,17 @@ Lforward:
 @------------------------------------------------------------------------------
         mcrr  p7, #15, r5, r4, c1
         mcrr2  p7, #15, r5, r4, c1
+        MCRR  P7, #15, R5, R4, C1
+        MCRR2  P7, #15, R5, R4, C1
 
+@ CHECK: mcrr  p7, #15, r5, r4, c1      @ encoding: [0xf1,0x57,0x44,0xec]
+@ CHECK: mcrr2  p7, #15, r5, r4, c1     @ encoding: [0xf1,0x57,0x44,0xfc]
 @ CHECK: mcrr  p7, #15, r5, r4, c1      @ encoding: [0xf1,0x57,0x44,0xec]
 @ CHECK: mcrr2  p7, #15, r5, r4, c1     @ encoding: [0xf1,0x57,0x44,0xfc]
 
         mcrrgt  p7, #15, r5, r4, c1
+        MCRRGT  P7, #15, R5, R4, C1
+@ CHECK: mcrrgt  p7, #15, r5, r4, c1     @ encoding: [0xf1,0x57,0x44,0xcc]
 @ CHECK: mcrrgt  p7, #15, r5, r4, c1     @ encoding: [0xf1,0x57,0x44,0xcc]
 
 @------------------------------------------------------------------------------
@@ -1385,13 +1397,23 @@ Lforward:
         mrc  p15, #7, apsr_nzcv, c15, c6, #6
         mrc2  p14, #0, r1, c1, c2, #4
         mrc2  p9, #7, apsr_nzcv, c15, c0, #1
+        MRC  P14, #0, R1, C1, C2, #4
+        MRC  P15, #7, APSR_NZCV, C15, C6, #6
+        MRC2  P14, #0, R1, C1, C2, #4
+        MRC2  P9, #7, APSR_NZCV, C15, C0, #1
 
+@ CHECK: mrc  p14, #0, r1, c1, c2, #4             @ encoding: [0x92,0x1e,0x11,0xee]
+@ CHECK: mrc  p15, #7, apsr_nzcv, c15, c6, #6     @ encoding: [0xd6,0xff,0xff,0xee]
+@ CHECK: mrc2  p14, #0, r1, c1, c2, #4            @ encoding: [0x92,0x1e,0x11,0xfe]
+@ CHECK: mrc2  p9, #7, apsr_nzcv, c15, c0, #1     @ encoding: [0x30,0xf9,0xff,0xfe]
 @ CHECK: mrc  p14, #0, r1, c1, c2, #4             @ encoding: [0x92,0x1e,0x11,0xee]
 @ CHECK: mrc  p15, #7, apsr_nzcv, c15, c6, #6     @ encoding: [0xd6,0xff,0xff,0xee]
 @ CHECK: mrc2  p14, #0, r1, c1, c2, #4            @ encoding: [0x92,0x1e,0x11,0xfe]
 @ CHECK: mrc2  p9, #7, apsr_nzcv, c15, c0, #1     @ encoding: [0x30,0xf9,0xff,0xfe]
 
          mrceq  p15, #7, apsr_nzcv, c15, c6, #6
+         MRCEQ  P15, #7, APSR_NZCV, C15, C6, #6
+@ CHECK: mrceq  p15, #7, apsr_nzcv, c15, c6, #6   @ encoding: [0xd6,0xff,0xff,0x0e]
 @ CHECK: mrceq  p15, #7, apsr_nzcv, c15, c6, #6   @ encoding: [0xd6,0xff,0xff,0x0e]
 
 @------------------------------------------------------------------------------
@@ -1399,11 +1421,17 @@ Lforward:
 @------------------------------------------------------------------------------
         mrrc  p7, #1, r5, r4, c1
         mrrc2  p7, #1, r5, r4, c1
+        MRRC  P7, #1, R5, R4, C1
+        MRRC2  P7, #1, R5, R4, C1
 
+@ CHECK: mrrc  p7, #1, r5, r4, c1       @ encoding: [0x11,0x57,0x54,0xec]
+@ CHECK: mrrc2  p7, #1, r5, r4, c1      @ encoding: [0x11,0x57,0x54,0xfc]
 @ CHECK: mrrc  p7, #1, r5, r4, c1       @ encoding: [0x11,0x57,0x54,0xec]
 @ CHECK: mrrc2  p7, #1, r5, r4, c1      @ encoding: [0x11,0x57,0x54,0xfc]
 
         mrrclo  p7, #1, r5, r4, c1
+        MRRCLO  P7, #1, R5, R4, C1
+@ CHECK: mrrclo  p7, #1, r5, r4, c1      @ encoding: [0x11,0x57,0x54,0x3c]
 @ CHECK: mrrclo  p7, #1, r5, r4, c1      @ encoding: [0x11,0x57,0x54,0x3c]
 
 @------------------------------------------------------------------------------

diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s
index 4226b8092cf1fce626073299e995dc07e3502b2e..59f64afb2dde8e7e0595c804ea81795f5c729fcc 100644 (file)
--- a/test/MC/ARM/basic-thumb2-instructions.s
+++ b/test/MC/ARM/basic-thumb2-instructions.s
@@ -1409,11 +1409,19 @@ _func:
         mcr2  p7, #1, r5, c1, c1, #4
         mcr p14, #0, r4, c0, c5
         mcr2 p4, #2, r2, c1, c3
+        MCR  P7, #1, R5, C1, C1, #4
+        MCR2  P7, #1, R5, C1, C1, #4
+        MCR P14, #0, R4, C0, C5
+        MCR2 P4, #2, R2, C1, C3
 
 @ CHECK: mcr   p7, #1, r5, c1, c1, #4  @ encoding: [0x21,0xee,0x91,0x57]
 @ CHECK: mcr2  p7, #1, r5, c1, c1, #4  @ encoding: [0x21,0xfe,0x91,0x57]
 @ CHECK: mcr   p14, #0, r4, c0, c5, #0 @ encoding: [0x00,0xee,0x15,0x4e]
 @ CHECK: mcr2  p4, #2, r2, c1, c3, #0  @ encoding: [0x41,0xfe,0x13,0x24]
+@ CHECK: mcr   p7, #1, r5, c1, c1, #4  @ encoding: [0x21,0xee,0x91,0x57]
+@ CHECK: mcr2  p7, #1, r5, c1, c1, #4  @ encoding: [0x21,0xfe,0x91,0x57]
+@ CHECK: mcr   p14, #0, r4, c0, c5, #0 @ encoding: [0x00,0xee,0x15,0x4e]
+@ CHECK: mcr2  p4, #2, r2, c1, c3, #0  @ encoding: [0x41,0xfe,0x13,0x24]
 
 
 @------------------------------------------------------------------------------
@@ -1421,9 +1429,13 @@ _func:
 @------------------------------------------------------------------------------
         mcrr  p7, #15, r5, r4, c1
         mcrr2  p7, #15, r5, r4, c1
+        MCRR  P7, #15, R5, R4, C1
+        MCRR2  P7, #15, R5, R4, C1
 
 @ CHECK: mcrr  p7, #15, r5, r4, c1     @ encoding: [0x44,0xec,0xf1,0x57]
 @ CHECK: mcrr2 p7, #15, r5, r4, c1     @ encoding: [0x44,0xfc,0xf1,0x57]
+@ CHECK: mcrr  p7, #15, r5, r4, c1     @ encoding: [0x44,0xec,0xf1,0x57]
+@ CHECK: mcrr2 p7, #15, r5, r4, c1     @ encoding: [0x44,0xfc,0xf1,0x57]
 
 
 @------------------------------------------------------------------------------
@@ -1571,6 +1583,12 @@ _func:
         mrc2 p12, #3, r3, c3, c4
         mrc2 p14, #0, r1, c1, c2, #4
         mrc2 p8, #7, apsr_nzcv, c15, c0, #1
+        MRC  P14, #0, R1, C1, C2, #4
+        MRC  P15, #7, APSR_NZCV, C15, C6, #6
+        MRC  P9, #1, R1, C2, C2
+        MRC2 P12, #3, R3, C3, C4
+        MRC2 P14, #0, R1, C1, C2, #4
+        MRC2 P8, #7, APSR_NZCV, C15, C0, #1
  
 @ CHECK: mrc  p14, #0, r1, c1, c2, #4            @ encoding: [0x11,0xee,0x92,0x1e]
 @ CHECK: mrc  p15, #7, apsr_nzcv, c15, c6, #6    @ encoding: [0xff,0xee,0xd6,0xff]
@@ -1578,15 +1596,25 @@ _func:
 @ CHECK: mrc2 p12, #3, r3, c3, c4, #0            @ encoding: [0x73,0xfe,0x14,0x3c]
 @ CHECK: mrc2 p14, #0, r1, c1, c2, #4            @ encoding: [0x11,0xfe,0x92,0x1e]
 @ CHECK: mrc2 p8, #7, apsr_nzcv, c15, c0, #1     @ encoding: [0xff,0xfe,0x30,0xf8]
+@ CHECK: mrc  p14, #0, r1, c1, c2, #4            @ encoding: [0x11,0xee,0x92,0x1e]
+@ CHECK: mrc  p15, #7, apsr_nzcv, c15, c6, #6    @ encoding: [0xff,0xee,0xd6,0xff]
+@ CHECK: mrc  p9, #1, r1, c2, c2, #0             @ encoding: [0x32,0xee,0x12,0x19]
+@ CHECK: mrc2 p12, #3, r3, c3, c4, #0            @ encoding: [0x73,0xfe,0x14,0x3c]
+@ CHECK: mrc2 p14, #0, r1, c1, c2, #4            @ encoding: [0x11,0xfe,0x92,0x1e]
+@ CHECK: mrc2 p8, #7, apsr_nzcv, c15, c0, #1     @ encoding: [0xff,0xfe,0x30,0xf8]
  
 @------------------------------------------------------------------------------
 @ MRRC/MRRC2
 @------------------------------------------------------------------------------
         mrrc  p7, #1, r5, r4, c1
         mrrc2  p7, #1, r5, r4, c1
+        MRRC  P7, #1, R5, R4, C1
+        MRRC2  P7, #1, R5, R4, C1
 
 @ CHECK: mrrc  p7, #1, r5, r4, c1      @ encoding: [0x54,0xec,0x11,0x57]
 @ CHECK: mrrc2 p7, #1, r5, r4, c1      @ encoding: [0x54,0xfc,0x11,0x57]
+@ CHECK: mrrc  p7, #1, r5, r4, c1      @ encoding: [0x54,0xec,0x11,0x57]
+@ CHECK: mrrc2 p7, #1, r5, r4, c1      @ encoding: [0x54,0xfc,0x11,0x57]
 
 
 @------------------------------------------------------------------------------