]> granicus.if.org Git - clang/commitdiff
[X86] AMD Bobcat CPU (btver1) doesn't support XSAVE
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sat, 5 Mar 2016 14:35:44 +0000 (14:35 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sat, 5 Mar 2016 14:35:44 +0000 (14:35 +0000)
btver1 is a SSSE3/SSE4a only CPU - it doesn't have AVX and doesn't support XSAVE.

Differential Revision: http://reviews.llvm.org/D17682

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@262772 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Basic/Targets.cpp
test/Preprocessor/predefined-arch-macros.c

index 4a9b6dc4d5b4112de736ddc2f0572e51449affa7..05694cc5a724d712e1e79517c2351caf436a4f9f 100644 (file)
@@ -2765,7 +2765,6 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "prfchw", true);
     setFeatureEnabledImpl(Features, "cx16", true);
     setFeatureEnabledImpl(Features, "fxsr", true);
-    setFeatureEnabledImpl(Features, "xsave", true);
     break;
   case CK_BDVER4:
     setFeatureEnabledImpl(Features, "avx2", true);
index 873370ecb39e0e7f2d2d51e95309b2a9f128f948..af6b89b7756c22fcfd467aecdea56dd6ecb2dfc2 100644 (file)
 // CHECK_BTVER1_M32: #define __SSE_MATH__ 1
 // CHECK_BTVER1_M32: #define __SSE__ 1
 // CHECK_BTVER1_M32: #define __SSSE3__ 1
-// CHECK_BTVER1_M32: #define __XSAVE__ 1
 // CHECK_BTVER1_M32: #define __btver1 1
 // CHECK_BTVER1_M32: #define __btver1__ 1
 // CHECK_BTVER1_M32: #define __i386 1
 // CHECK_BTVER1_M64: #define __SSE_MATH__ 1
 // CHECK_BTVER1_M64: #define __SSE__ 1
 // CHECK_BTVER1_M64: #define __SSSE3__ 1
-// CHECK_BTVER1_M64: #define __XSAVE__ 1
 // CHECK_BTVER1_M64: #define __amd64 1
 // CHECK_BTVER1_M64: #define __amd64__ 1
 // CHECK_BTVER1_M64: #define __btver1 1