Regen yasm_arch.7 and yasm_objfmts.7.

diff --git a/yasm_arch.7 b/yasm_arch.7
index bd72d3ffb75f6f0f2dc26453e5f673942f90776d..ccdfd0563211b364139744ecc882b84d8fdbd0ac 100644 (file)
--- a/yasm_arch.7
+++ b/yasm_arch.7
@@ -1,7 +1,7 @@
 '\" t
 .\"     Title: yasm_arch
 .\"    Author: Peter Johnson <peter@tortall.net>
-.\" Generator: DocBook XSL Stylesheets v1.75.2 <http://docbook.sf.net/>
+.\" Generator: DocBook XSL Stylesheets v1.76.1 <http://docbook.sf.net/>
 .\"      Date: October 2006
 .\"    Manual: Yasm Supported Architectures
 .\"    Source: Yasm
@@ -9,6 +9,15 @@
 .\"
 .TH "YASM_ARCH" "7" "October 2006" "Yasm" "Yasm Supported Architectures"
 .\" -----------------------------------------------------------------
+.\" * Define some portability stuff
+.\" -----------------------------------------------------------------
+.\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.\" http://bugs.debian.org/507673
+.\" http://lists.gnu.org/archive/html/groff/2009-02/msg00013.html
+.\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\" -----------------------------------------------------------------
 .\" * set default formatting
 .\" -----------------------------------------------------------------
 .\" disable hyphenation
@@ -73,12 +82,14 @@ Recently, Intel has introduced an essentially identical version of AMD64 called
 When an AMD64\-supporting processor is executing in 64\-bit mode, a number of additional extensions are available, including extra general purpose registers, extra SSE2 registers, and RIP\-relative addressing\&.
 .PP
 Yasm extends the base NASM syntax to support AMD64 as follows\&. To enable assembly of instructions for the 64\-bit mode of AMD64 processors, use the directive
-\fBBITS 64\fR\&. As with NASM\'s BITS directive, this does not change the format of the output object file to 64 bits; it only changes the assembler mode to assume that the instructions being assembled will be run in 64\-bit mode\&. To specify an AMD64 object file, use
+\fBBITS 64\fR\&. As with NASM\*(Aqs BITS directive, this does not change the format of the output object file to 64 bits; it only changes the assembler mode to assume that the instructions being assembled will be run in 64\-bit mode\&. To specify an AMD64 object file, use
 \fB\-m amd64\fR
 on the Yasm command line, or explicitly target a 64\-bit object format such as
 \fB\-f win64\fR
 or
 \fB\-f elf64\fR\&.
+\fB\-f elfx32\fR
+can be used to select 32\-bit ELF object format for AMD64 processors\&.
 .sp
 .it 1 an-trap
 .nr an-no-space-flag 1
@@ -762,9 +773,9 @@ mov [rel sym], rbx  ; RIP\-relative (explicit override)
 \fBMemory references\fR
 .RS 4
 .PP
-Usually the size of a memory reference can be deduced by which registers you\'re moving\-\-for example, "mov [rax],ecx" is a 32\-bit move, because ecx is 32 bits\&. YASM currently gives the non\-obvious "invalid combination of opcode and operands" error if it can\'t figure out how much memory you\'re moving\&. The fix in this case is to add a memory size specifier: qword, dword, word, or byte\&.
+Usually the size of a memory reference can be deduced by which registers you\*(Aqre moving\-\-for example, "mov [rax],ecx" is a 32\-bit move, because ecx is 32 bits\&. YASM currently gives the non\-obvious "invalid combination of opcode and operands" error if it can\*(Aqt figure out how much memory you\*(Aqre moving\&. The fix in this case is to add a memory size specifier: qword, dword, word, or byte\&.
 .PP
-Here\'s a 64\-bit memory move, which sets 8 bytes starting at rax:
+Here\*(Aqs a 64\-bit memory move, which sets 8 bytes starting at rax:
 .sp
 .if n \{\
 .RS 4
@@ -776,7 +787,7 @@ mov qword [rax], 1
 .RE
 .\}
 .PP
-Here\'s a 32\-bit memory move, which sets 4 bytes:
+Here\*(Aqs a 32\-bit memory move, which sets 4 bytes:
 .sp
 .if n \{\
 .RS 4
@@ -788,7 +799,7 @@ mov dword [rax], 1
 .RE
 .\}
 .PP
-Here\'s a 16\-bit memory move, which sets 2 bytes:
+Here\*(Aqs a 16\-bit memory move, which sets 2 bytes:
 .sp
 .if n \{\
 .RS 4
@@ -800,7 +811,7 @@ mov word [rax], 1
 .RE
 .\}
 .PP
-Here\'s an 8\-bit memory move, which sets 1 byte:
+Here\*(Aqs an 8\-bit memory move, which sets 1 byte:
 .sp
 .if n \{\
 .RS 4

diff --git a/yasm_objfmts.7 b/yasm_objfmts.7
index 5f642735440e940c49982a8eb6de743cfeb24622..bc6498601e8607d5fb76372d99d13afc682b38cd 100644 (file)
--- a/yasm_objfmts.7
+++ b/yasm_objfmts.7
@@ -1,7 +1,7 @@
 '\" t
 .\"     Title: yasm_objfmts
 .\"    Author: Peter Johnson <peter@tortall.net>
-.\" Generator: DocBook XSL Stylesheets v1.75.2 <http://docbook.sf.net/>
+.\" Generator: DocBook XSL Stylesheets v1.76.1 <http://docbook.sf.net/>
 .\"      Date: February 2007
 .\"    Manual: Yasm Supported Object Formats
 .\"    Source: Yasm
@@ -9,6 +9,15 @@
 .\"
 .TH "YASM_OBJFMTS" "7" "February 2007" "Yasm" "Yasm Supported Object Formats"
 .\" -----------------------------------------------------------------
+.\" * Define some portability stuff
+.\" -----------------------------------------------------------------
+.\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.\" http://bugs.debian.org/507673
+.\" http://lists.gnu.org/archive/html/groff/2009-02/msg00013.html
+.\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\" -----------------------------------------------------------------
 .\" * set default formatting
 .\" -----------------------------------------------------------------
 .\" disable hyphenation
@@ -25,7 +34,7 @@ yasm_objfmts \- Yasm Supported Object Formats
 \fByasm\fR \fB\-f\ \fR\fB\fIobjfmt\fR\fR \fB\fI\&.\&.\&.\fR\fR
 .SH "DESCRIPTION"
 .PP
-The standard Yasm distribution includes a number of modules for different object formats (Yasm\'s primary output)\&.
+The standard Yasm distribution includes a number of modules for different object formats (Yasm\*(Aqs primary output)\&.
 .PP
 The object format is selected on the
 \fByasm\fR(1)
@@ -46,14 +55,16 @@ The
 \(lqdbg\(rq
 object format is not a
 \(lqreal\(rq
-object format; the output file it creates simply describes the sequence of calls made to it by Yasm and the final object and symbol table information in a human\-readable text format (that in a normal object format would get processed into that object format\'s particular binary representation)\&. This object format is not intended for real use, but rather for debugging Yasm\'s internals\&.
+object format; the output file it creates simply describes the sequence of calls made to it by Yasm and the final object and symbol table information in a human\-readable text format (that in a normal object format would get processed into that object format\*(Aqs particular binary representation)\&. This object format is not intended for real use, but rather for debugging Yasm\*(Aqs internals\&.
 .SH "ELF"
 .PP
-The ELF object format really comes in two flavors:
+The ELF object format really comes in three flavors:
 \(lqelf32\(rq
-(for 32\-bit targets) and
+(for 32\-bit targets),
 \(lqelf64\(rq
-(for 64\-bit targets)\&. ELF is a standard object format in common use on modern Unix and compatible systems (e\&.g\&. Linux, FreeBSD)\&. ELF has complex support for relocatable and shared objects\&.
+(for 64\-bit targets and
+\(lqelfx32\(rq
+(for x32 targets)\&. ELF is a standard object format in common use on modern Unix and compatible systems (e\&.g\&. Linux, FreeBSD)\&. ELF has complex support for relocatable and shared objects\&.
 .SH "MACHO"
 .PP
 The Mach\-O object format really comes in two flavors:
@@ -74,7 +85,7 @@ The Win64 object format produces object files compatible with Microsoft compiler
 Windows platform\&. This format is very similar to the win32 object format, but produces 64\-bit objects\&.
 .SH "XDF"
 .PP
-The XDF object format is essentially a simplified version of COFF\&. It\'s a multi\-section relocatable format that supports 64\-bit physical and virtual addresses\&.
+The XDF object format is essentially a simplified version of COFF\&. It\*(Aqs a multi\-section relocatable format that supports 64\-bit physical and virtual addresses\&.
 .SH "SEE ALSO"
 .PP
 \fByasm\fR(1),