Strip trailing whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299438 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index e3fee6fbb638e5b234ffa1ab42dd0d24b52a3f49..22afa6995cc559092b5cf13d738cf7deab462ef6 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -29328,14 +29328,14 @@ static SDValue combineBasicSADPattern(SDNode *Extract, SelectionDAG &DAG,
   SDValue Root = matchBinOpReduction(Extract, ISD::ADD);
 
   // The operand is expected to be zero extended from i8
-  // (verified in detectZextAbsDiff). 
-  // In order to convert to i64 and above, additional any/zero/sign 
+  // (verified in detectZextAbsDiff).
+  // In order to convert to i64 and above, additional any/zero/sign
   // extend is expected.
   // The zero extend from 32 bit has no mathematical effect on the result.
-  // Also the sign extend is basically zero extend 
+  // Also the sign extend is basically zero extend
   // (extends the sign bit which is zero).
   // So it is correct to skip the sign/zero extend instruction.
-  if (Root && (Root.getOpcode() == ISD::SIGN_EXTEND || 
+  if (Root && (Root.getOpcode() == ISD::SIGN_EXTEND ||
          Root.getOpcode() == ISD::ZERO_EXTEND ||
          Root.getOpcode() == ISD::ANY_EXTEND))
     Root = Root.getOperand(0);