]> granicus.if.org Git - llvm/commitdiff
[AMDGPU][NFC] Rename SIInsertNops -> SIDebuggerInsertNops
authorKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>
Tue, 10 May 2016 18:33:41 +0000 (18:33 +0000)
committerKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>
Tue, 10 May 2016 18:33:41 +0000 (18:33 +0000)
Differential Revision: http://reviews.llvm.org/D20117

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269098 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AMDGPU/AMDGPU.h
lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
lib/Target/AMDGPU/CMakeLists.txt
lib/Target/AMDGPU/SIDebuggerInsertNops.cpp [moved from lib/Target/AMDGPU/SIInsertNopsPass.cpp with 79% similarity]

index 524b52df04f424cf99cdaa8a2f6093c536caf174..5cf3c89ac0beaafb5cd624898c8efa8d98e03862 100644 (file)
@@ -49,7 +49,7 @@ FunctionPass *createSILowerControlFlowPass();
 FunctionPass *createSIFixControlFlowLiveIntervalsPass();
 FunctionPass *createSIFixSGPRCopiesPass();
 FunctionPass *createSICodeEmitterPass(formatted_raw_ostream &OS);
-FunctionPass *createSIInsertNopsPass();
+FunctionPass *createSIDebuggerInsertNopsPass();
 FunctionPass *createSIInsertWaitsPass();
 
 ScheduleDAGInstrs *createSIMachineScheduler(MachineSchedContext *C);
@@ -98,8 +98,8 @@ extern char &AMDGPUAnnotateUniformValuesPassID;
 void initializeSIAnnotateControlFlowPass(PassRegistry&);
 extern char &SIAnnotateControlFlowPassID;
 
-void initializeSIInsertNopsPass(PassRegistry&);
-extern char &SIInsertNopsID;
+void initializeSIDebuggerInsertNopsPass(PassRegistry&);
+extern char &SIDebuggerInsertNopsID;
 
 void initializeSIInsertWaitsPass(PassRegistry&);
 extern char &SIInsertWaitsID;
index 4641439fd9641cd635bd4b5a8e3cf83137862a6c..4fd1ff962e293231a2721aff96ee66537455a5f7 100644 (file)
@@ -55,7 +55,7 @@ extern "C" void LLVMInitializeAMDGPUTarget() {
   initializeAMDGPUAnnotateUniformValuesPass(*PR);
   initializeAMDGPUPromoteAllocaPass(*PR);
   initializeSIAnnotateControlFlowPass(*PR);
-  initializeSIInsertNopsPass(*PR);
+  initializeSIDebuggerInsertNopsPass(*PR);
   initializeSIInsertWaitsPass(*PR);
   initializeSIWholeQuadModePass(*PR);
   initializeSILowerControlFlowPass(*PR);
@@ -396,7 +396,7 @@ void GCNPassConfig::addPreEmitPass() {
   addPass(createSIInsertWaitsPass(), false);
   addPass(createSIShrinkInstructionsPass());
   addPass(createSILowerControlFlowPass(), false);
-  addPass(createSIInsertNopsPass(), false);
+  addPass(createSIDebuggerInsertNopsPass(), false);
 }
 
 TargetPassConfig *GCNTargetMachine::createPassConfig(PassManagerBase &PM) {
index d09791f06e4e9906b9a7fa9320eaab428e68a37d..ad70664473dc082b4a96164255efb14d3865b795 100644 (file)
@@ -61,11 +61,11 @@ add_llvm_target(AMDGPUCodeGen
   R600RegisterInfo.cpp
   R600TextureIntrinsicsReplacer.cpp
   SIAnnotateControlFlow.cpp
+  SIDebuggerInsertNops.cpp
   SIFixControlFlowLiveIntervals.cpp
   SIFixSGPRCopies.cpp
   SIFoldOperands.cpp
   SIFrameLowering.cpp
-  SIInsertNopsPass.cpp
   SIInsertWaits.cpp
   SIInstrInfo.cpp
   SIISelLowering.cpp
similarity index 79%
rename from lib/Target/AMDGPU/SIInsertNopsPass.cpp
rename to lib/Target/AMDGPU/SIDebuggerInsertNops.cpp
index 77200189159b12f94eb5132e889c0f518944f98e..a2d04bb0ba1cc69f6910f11b9451aa3f8ca3fa3e 100644 (file)
@@ -1,4 +1,4 @@
-//===--- SIInsertNopsPass.cpp - Use predicates for control flow -----------===//
+//===--- SIDebuggerInsertNops.cpp - Inserts nops for debugger usage -------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -8,7 +8,8 @@
 //===----------------------------------------------------------------------===//
 //
 /// \file
-/// \brief Insert two nop instructions for each high level source statement.
+/// \brief Inserts two nop instructions for each high level source statement for
+/// debugger usage.
 ///
 /// Tools, such as debugger, need to pause execution based on user input (i.e.
 /// breakpoint). In order to do this, two nop instructions are inserted for each
 #include "llvm/CodeGen/MachineModuleInfo.h"
 using namespace llvm;
 
-#define DEBUG_TYPE "si-insert-nops"
-#define PASS_NAME "SI Insert Nops"
+#define DEBUG_TYPE "si-debugger-insert-nops"
+#define PASS_NAME "SI Debugger Insert Nops"
 
 namespace {
 
-class SIInsertNops : public MachineFunctionPass {
+class SIDebuggerInsertNops : public MachineFunctionPass {
 public:
   static char ID;
 
-  SIInsertNops() : MachineFunctionPass(ID) { }
+  SIDebuggerInsertNops() : MachineFunctionPass(ID) { }
   const char *getPassName() const override { return PASS_NAME; }
 
   bool runOnMachineFunction(MachineFunction &MF) override;
@@ -44,17 +45,18 @@ public:
 
 } // anonymous namespace
 
-INITIALIZE_PASS(SIInsertNops, DEBUG_TYPE, PASS_NAME, false, false)
+INITIALIZE_PASS(SIDebuggerInsertNops, DEBUG_TYPE, PASS_NAME, false, false)
 
-char SIInsertNops::ID = 0;
-char &llvm::SIInsertNopsID = SIInsertNops::ID;
+char SIDebuggerInsertNops::ID = 0;
+char &llvm::SIDebuggerInsertNopsID = SIDebuggerInsertNops::ID;
 
-FunctionPass *llvm::createSIInsertNopsPass() {
-  return new SIInsertNops();
+FunctionPass *llvm::createSIDebuggerInsertNopsPass() {
+  return new SIDebuggerInsertNops();
 }
 
-bool SIInsertNops::runOnMachineFunction(MachineFunction &MF) {
-  // Skip this pass if debugger-insert-nops feature is not enabled.
+bool SIDebuggerInsertNops::runOnMachineFunction(MachineFunction &MF) {
+  // Skip this pass if "amdgpu-debugger-insert-nops" attribute was not
+  // specified.
   const AMDGPUSubtarget &ST = MF.getSubtarget<AMDGPUSubtarget>();
   if (!ST.debuggerInsertNops())
     return false;