};
private:
StackDirection StackDir;
- unsigned StackAlignment;
+ Align StackAlignment;
unsigned TransientStackAlignment;
int LocalAreaOffset;
bool StackRealignable;
public:
- TargetFrameLowering(StackDirection D, unsigned StackAl, int LAO,
+ TargetFrameLowering(StackDirection D, Align StackAl, int LAO,
unsigned TransAl = 1, bool StackReal = true)
- : StackDir(D), StackAlignment(StackAl), TransientStackAlignment(TransAl),
- LocalAreaOffset(LAO), StackRealignable(StackReal) {}
+ : StackDir(D), StackAlignment(StackAl), TransientStackAlignment(TransAl),
+ LocalAreaOffset(LAO), StackRealignable(StackReal) {}
virtual ~TargetFrameLowering();
/// stack pointer must be aligned on entry to a function. Typically, this
/// is the largest alignment for any data object in the target.
///
- unsigned getStackAlignment() const { return StackAlignment; }
+ unsigned getStackAlignment() const { return StackAlignment.value(); }
/// alignSPAdjust - This method aligns the stack adjustment to the correct
/// alignment.
class AArch64FrameLowering : public TargetFrameLowering {
public:
explicit AArch64FrameLowering()
- : TargetFrameLowering(StackGrowsDown, 16, 0, 16,
+ : TargetFrameLowering(StackGrowsDown, Align(16), 0, 16,
true /*StackRealignable*/) {}
void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
#include "AMDGPUFrameLowering.h"
using namespace llvm;
-AMDGPUFrameLowering::AMDGPUFrameLowering(StackDirection D, unsigned StackAl,
- int LAO, unsigned TransAl)
- : TargetFrameLowering(D, StackAl, LAO, TransAl) { }
+AMDGPUFrameLowering::AMDGPUFrameLowering(StackDirection D, Align StackAl,
+ int LAO, unsigned TransAl)
+ : TargetFrameLowering(D, StackAl, LAO, TransAl) {}
AMDGPUFrameLowering::~AMDGPUFrameLowering() = default;
/// See TargetFrameInfo for more comments.
class AMDGPUFrameLowering : public TargetFrameLowering {
public:
- AMDGPUFrameLowering(StackDirection D, unsigned StackAl, int LAO,
+ AMDGPUFrameLowering(StackDirection D, Align StackAl, int LAO,
unsigned TransAl = 1);
~AMDGPUFrameLowering() override;
// on the pointer value itself may rely on the alignment / known low bits of
// the pointer. Set this to something above the minimum to avoid needing
// dynamic realignment in common cases.
- unsigned getStackAlignment() const {
- return 16;
- }
+ Align getStackAlignment() const { return Align(16); }
bool enableMachineScheduler() const override {
return true;
return Gen;
}
- unsigned getStackAlignment() const {
- return 4;
- }
+ Align getStackAlignment() const { return Align(4); }
R600Subtarget &initializeSubtargetDependencies(const Triple &TT,
StringRef GPU, StringRef FS);
class R600FrameLowering : public AMDGPUFrameLowering {
public:
- R600FrameLowering(StackDirection D, unsigned StackAl, int LAO,
- unsigned TransAl = 1) :
- AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
+ R600FrameLowering(StackDirection D, Align StackAl, int LAO,
+ unsigned TransAl = 1)
+ : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
~R600FrameLowering() override;
void emitPrologue(MachineFunction &MF,
class SIFrameLowering final : public AMDGPUFrameLowering {
public:
- SIFrameLowering(StackDirection D, unsigned StackAl, int LAO,
- unsigned TransAl = 1) :
- AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
+ SIFrameLowering(StackDirection D, Align StackAl, int LAO,
+ unsigned TransAl = 1)
+ : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
~SIFrameLowering() override = default;
void emitEntryFunctionPrologue(MachineFunction &MF,
int32_t Offset = LocMemOffset;
SDValue PtrOff = DAG.getConstant(Offset, DL, PtrVT);
- unsigned Align = 0;
+ MaybeAlign Alignment;
if (IsTailCall) {
ISD::ArgFlagsTy Flags = Outs[realArgIdx].Flags;
Flags.getByValSize() : VA.getValVT().getStoreSize();
// FIXME: We can have better than the minimum byval required alignment.
- Align = Flags.isByVal() ? Flags.getByValAlign() :
- MinAlign(Subtarget->getStackAlignment(), Offset);
+ Alignment =
+ Flags.isByVal()
+ ? MaybeAlign(Flags.getByValAlign())
+ : commonAlignment(Subtarget->getStackAlignment(), Offset);
Offset = Offset + FPDiff;
int FI = MFI.CreateFixedObject(OpSize, Offset, true);
} else {
DstAddr = PtrOff;
DstInfo = MachinePointerInfo::getStack(MF, LocMemOffset);
- Align = MinAlign(Subtarget->getStackAlignment(), LocMemOffset);
+ Alignment =
+ commonAlignment(Subtarget->getStackAlignment(), LocMemOffset);
}
if (Outs[i].Flags.isByVal()) {
MemOpChains.push_back(Cpy);
} else {
- SDValue Store = DAG.getStore(Chain, DL, Arg, DstAddr, DstInfo, Align);
+ SDValue Store = DAG.getStore(Chain, DL, Arg, DstAddr, DstInfo,
+ Alignment ? Alignment->value() : 0);
MemOpChains.push_back(Store);
}
}
class ARCFrameLowering : public TargetFrameLowering {
public:
ARCFrameLowering(const ARCSubtarget &st)
- : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0), ST(st) {
- }
+ : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(4), 0),
+ ST(st) {}
/// Insert Prologue into the function.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
NoARM = true;
if (isAAPCS_ABI())
- stackAlignment = 8;
+ stackAlignment = Align(8);
if (isTargetNaCl() || isAAPCS16_ABI())
- stackAlignment = 16;
+ stackAlignment = Align(16);
// FIXME: Completely disable sibcall for Thumb1 since ThumbRegisterInfo::
// emitEpilogue is not ready for them. Thumb tail calls also use t2B, as
/// stackAlignment - The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
- unsigned stackAlignment = 4;
+ Align stackAlignment = Align(4);
/// CPUString - String name of used CPU.
std::string CPUString;
/// getStackAlignment - Returns the minimum alignment known to hold of the
/// stack frame on entry to the function and which must be maintained by every
/// function for this subtarget.
- unsigned getStackAlignment() const { return stackAlignment; }
+ Align getStackAlignment() const { return stackAlignment; }
unsigned getMaxInterleaveFactor() const { return MaxInterleaveFactor; }
namespace llvm {
AVRFrameLowering::AVRFrameLowering()
- : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 1, -2) {}
+ : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align::None(),
+ -2) {}
bool AVRFrameLowering::canSimplifyCallFramePseudos(
const MachineFunction &MF) const {
class BPFFrameLowering : public TargetFrameLowering {
public:
explicit BPFFrameLowering(const BPFSubtarget &sti)
- : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8, 0) {}
+ : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(8), 0) {}
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
class HexagonFrameLowering : public TargetFrameLowering {
public:
explicit HexagonFrameLowering()
- : TargetFrameLowering(StackGrowsDown, 8, 0, 1, true) {}
+ : TargetFrameLowering(StackGrowsDown, Align(8), 0, 1, true) {}
// All of the prolog/epilog functionality, including saving and restoring
// callee-saved registers is handled in emitPrologue. This is to have the
public:
explicit LanaiFrameLowering(const LanaiSubtarget &Subtarget)
: TargetFrameLowering(StackGrowsDown,
- /*StackAlignment=*/8,
+ /*StackAlignment=*/Align(8),
/*LocalAreaOffset=*/0),
STI(Subtarget) {}
public:
explicit MSP430FrameLowering()
- : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 2, -2, 2) {}
+ : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(2), -2,
+ 2) {}
/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
/// the function.
StringRef CPU = MIPS_MC::selectMipsCPU(TT, TM.getTargetCPU());
StringRef FS = TM.getTargetFeatureString();
const MipsTargetMachine &MTM = static_cast<const MipsTargetMachine &>(TM);
- const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM, 0);
+ const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM, None);
bool IsABICalls = STI.isABICalls();
const MipsABIInfo &ABI = MTM.getABI();
const MipsSubtarget &STI;
public:
- explicit MipsFrameLowering(const MipsSubtarget &sti, unsigned Alignment)
- : TargetFrameLowering(StackGrowsDown, Alignment, 0, Alignment), STI(sti) {}
+ explicit MipsFrameLowering(const MipsSubtarget &sti, Align Alignment)
+ : TargetFrameLowering(StackGrowsDown, Alignment, 0, Alignment.value()),
+ STI(sti) {}
static const MipsFrameLowering *create(const MipsSubtarget &ST);
MipsSubtarget::MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
bool little, const MipsTargetMachine &TM,
- unsigned StackAlignOverride)
+ MaybeAlign StackAlignOverride)
: MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(MipsDefault),
IsLittle(little), IsSoftFloat(false), IsSingleFloat(false), IsFPXX(false),
NoABICalls(false), Abs2008(false), IsFP64bit(false), UseOddSPReg(true),
Os16(Mips_Os16), HasMSA(false), UseTCCInDIV(false), HasSym32(false),
HasEVA(false), DisableMadd4(false), HasMT(false), HasCRC(false),
HasVirt(false), HasGINV(false), UseIndirectJumpsHazard(false),
- StackAlignOverride(StackAlignOverride),
- TM(TM), TargetTriple(TT), TSInfo(),
- InstrInfo(
- MipsInstrInfo::create(initializeSubtargetDependencies(CPU, FS, TM))),
+ StackAlignOverride(StackAlignOverride), TM(TM), TargetTriple(TT),
+ TSInfo(), InstrInfo(MipsInstrInfo::create(
+ initializeSubtargetDependencies(CPU, FS, TM))),
FrameLowering(MipsFrameLowering::create(*this)),
TLInfo(MipsTargetLowering::create(TM, *this)) {
InMips16HardFloat = true;
if (StackAlignOverride)
- stackAlignment = StackAlignOverride;
+ stackAlignment = *StackAlignOverride;
else if (isABI_N32() || isABI_N64())
- stackAlignment = 16;
+ stackAlignment = Align(16);
else {
assert(isABI_O32() && "Unknown ABI for stack alignment!");
- stackAlignment = 8;
+ stackAlignment = Align(8);
}
return *this;
/// The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
- unsigned stackAlignment;
+ Align stackAlignment;
/// The overridden stack alignment.
- unsigned StackAlignOverride;
+ MaybeAlign StackAlignOverride;
InstrItineraryData InstrItins;
/// This constructor initializes the data members to match that
/// of the specified triple.
MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS, bool little,
- const MipsTargetMachine &TM, unsigned StackAlignOverride);
+ const MipsTargetMachine &TM, MaybeAlign StackAlignOverride);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
// really use them if in addition we are in mips16 mode
static bool useConstantIslands();
- unsigned getStackAlignment() const { return stackAlignment; }
+ Align getStackAlignment() const { return stackAlignment; }
// Grab relocation model
Reloc::Model getRelocationModel() const;
getEffectiveCodeModel(CM, CodeModel::Small), OL),
isLittle(isLittle), TLOF(std::make_unique<MipsTargetObjectFile>()),
ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)),
- Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this,
- Options.StackAlignmentOverride),
+ Subtarget(nullptr),
+ DefaultSubtarget(TT, CPU, FS, isLittle, *this,
+ MaybeAlign(Options.StackAlignmentOverride)),
NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16",
- isLittle, *this, Options.StackAlignmentOverride),
+ isLittle, *this,
+ MaybeAlign(Options.StackAlignmentOverride)),
Mips16Subtarget(TT, CPU, FS.empty() ? "+mips16" : FS.str() + ",+mips16",
- isLittle, *this, Options.StackAlignmentOverride) {
+ isLittle, *this,
+ MaybeAlign(Options.StackAlignmentOverride)) {
Subtarget = &DefaultSubtarget;
initAsmInfo();
}
// creation will depend on the TM and the code generation flags on the
// function that reside in TargetOptions.
resetTargetOptions(F);
- I = std::make_unique<MipsSubtarget>(TargetTriple, CPU, FS, isLittle, *this,
- Options.StackAlignmentOverride);
+ I = std::make_unique<MipsSubtarget>(
+ TargetTriple, CPU, FS, isLittle, *this,
+ MaybeAlign(Options.StackAlignmentOverride));
}
return I.get();
}
using namespace llvm;
NVPTXFrameLowering::NVPTXFrameLowering()
- : TargetFrameLowering(TargetFrameLowering::StackGrowsUp, 8, 0) {}
+ : TargetFrameLowering(TargetFrameLowering::StackGrowsUp, Align(8), 0) {}
bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
InstrInfo(*this), TLInfo(TM, *this) {}
void PPCSubtarget::initializeEnvironment() {
- StackAlignment = 16;
+ StackAlignment = Align(16);
DarwinDirective = PPC::DIR_NONE;
HasMFOCRF = false;
Has64BitSupport = false;
/// stackAlignment - The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
- unsigned StackAlignment;
+ Align StackAlignment;
/// Selected instruction itineraries (one entry per itinerary class.)
InstrItineraryData InstrItins;
/// getStackAlignment - Returns the minimum alignment known to hold of the
/// stack frame on entry to the function and which must be maintained by every
/// function for this subtarget.
- unsigned getStackAlignment() const { return StackAlignment; }
+ Align getStackAlignment() const { return StackAlignment; }
/// getDarwinDirective - Returns the -m directive specified for the cpu.
///
bool hasDirectMove() const { return HasDirectMove; }
bool isQPXStackUnaligned() const { return IsQPXStackUnaligned; }
- unsigned getPlatformStackAlignment() const {
+ Align getPlatformStackAlignment() const {
if ((hasQPX() || isBGQ()) && !isQPXStackUnaligned())
- return 32;
+ return Align(32);
- return 16;
+ return Align(16);
}
// DarwinABI has a 224-byte red zone. PPC32 SVR4ABI(Non-DarwinABI) has no
public:
explicit RISCVFrameLowering(const RISCVSubtarget &STI)
: TargetFrameLowering(StackGrowsDown,
- /*StackAlignment=*/16,
+ /*StackAlignment=*/Align(16),
/*LocalAreaOffset=*/0),
STI(STI) {}
SparcFrameLowering::SparcFrameLowering(const SparcSubtarget &ST)
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown,
- ST.is64Bit() ? 16 : 8, 0, ST.is64Bit() ? 16 : 8) {}
+ ST.is64Bit() ? Align(16) : Align(8), 0,
+ ST.is64Bit() ? 16 : 8) {}
void SparcFrameLowering::emitSPAdjustment(MachineFunction &MF,
MachineBasicBlock &MBB,
} // end anonymous namespace
SystemZFrameLowering::SystemZFrameLowering()
- : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8,
+ : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(8),
-SystemZMC::CallFrameSize, 8,
false /* StackRealignable */) {
// Create a mapping from register number to save slot offset.
static const size_t RedZoneSize = 128;
WebAssemblyFrameLowering()
- : TargetFrameLowering(StackGrowsDown, /*StackAlignment=*/16,
+ : TargetFrameLowering(StackGrowsDown, /*StackAlignment=*/Align(16),
/*LocalAreaOffset=*/0,
/*TransientStackAlignment=*/16,
/*StackRealignable=*/true) {}
using namespace llvm;
X86FrameLowering::X86FrameLowering(const X86Subtarget &STI,
- unsigned StackAlignOverride)
- : TargetFrameLowering(StackGrowsDown, StackAlignOverride,
+ MaybeAlign StackAlignOverride)
+ : TargetFrameLowering(StackGrowsDown, StackAlignOverride.valueOrOne(),
STI.is64Bit() ? -8 : -4),
STI(STI), TII(*STI.getInstrInfo()), TRI(STI.getRegisterInfo()) {
// Cache a bunch of frame-related predicates for this subtarget.
class X86FrameLowering : public TargetFrameLowering {
public:
- X86FrameLowering(const X86Subtarget &STI, unsigned StackAlignOverride);
+ X86FrameLowering(const X86Subtarget &STI, MaybeAlign StackAlignOverride);
// Cached subtarget predicates.
// Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD and Solaris (both
// 32 and 64 bit) and for all 64-bit targets.
if (StackAlignOverride)
- stackAlignment = StackAlignOverride;
+ stackAlignment = *StackAlignOverride;
else if (isTargetDarwin() || isTargetLinux() || isTargetSolaris() ||
isTargetKFreeBSD() || In64BitMode)
- stackAlignment = 16;
+ stackAlignment = Align(16);
// Some CPUs have more overhead for gather. The specified overhead is relative
// to the Load operation. "2" is the number provided by Intel architects. This
X86Subtarget::X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
const X86TargetMachine &TM,
- unsigned StackAlignOverride,
+ MaybeAlign StackAlignOverride,
unsigned PreferVectorWidthOverride,
unsigned RequiredVectorWidth)
- : X86GenSubtargetInfo(TT, CPU, FS),
- PICStyle(PICStyles::None), TM(TM), TargetTriple(TT),
- StackAlignOverride(StackAlignOverride),
+ : X86GenSubtargetInfo(TT, CPU, FS), PICStyle(PICStyles::None), TM(TM),
+ TargetTriple(TT), StackAlignOverride(StackAlignOverride),
PreferVectorWidthOverride(PreferVectorWidthOverride),
RequiredVectorWidth(RequiredVectorWidth),
In64BitMode(TargetTriple.getArch() == Triple::x86_64),
/// The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
- unsigned stackAlignment = 4;
+ Align stackAlignment = Align(4);
/// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops.
///
private:
/// Override the stack alignment.
- unsigned StackAlignOverride;
+ MaybeAlign StackAlignOverride;
/// Preferred vector width from function attribute.
unsigned PreferVectorWidthOverride;
/// of the specified triple.
///
X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
- const X86TargetMachine &TM, unsigned StackAlignOverride,
+ const X86TargetMachine &TM, MaybeAlign StackAlignOverride,
unsigned PreferVectorWidthOverride,
unsigned RequiredVectorWidth);
/// Returns the minimum alignment known to hold of the
/// stack frame on entry to the function and which must be maintained by every
/// function for this subtarget.
- unsigned getStackAlignment() const { return stackAlignment; }
+ Align getStackAlignment() const { return stackAlignment; }
/// Returns the maximum memset / memcpy size
/// that still makes it profitable to inline the call.
// creation will depend on the TM and the code generation flags on the
// function that reside in TargetOptions.
resetTargetOptions(F);
- I = std::make_unique<X86Subtarget>(TargetTriple, CPU, FS, *this,
- Options.StackAlignmentOverride,
- PreferVectorWidthOverride,
- RequiredVectorWidth);
+ I = std::make_unique<X86Subtarget>(
+ TargetTriple, CPU, FS, *this,
+ MaybeAlign(Options.StackAlignmentOverride), PreferVectorWidthOverride,
+ RequiredVectorWidth);
}
return I.get();
}
//===----------------------------------------------------------------------===//
XCoreFrameLowering::XCoreFrameLowering(const XCoreSubtarget &sti)
- : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0) {
+ : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(4), 0) {
// Do nothing
}
class BogusFrameLowering : public TargetFrameLowering {
public:
BogusFrameLowering()
- : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 4) {}
+ : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(4), 4) {}
void emitPrologue(MachineFunction &MF,
MachineBasicBlock &MBB) const override {}
projects / llvm / commitdiff