[X86][NFC] Add X86CmovConverterPass to the pass registry.

Differential Revision: https://reviews.llvm.org/D38355

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314726 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86CmovConversion.cpp b/lib/Target/X86/X86CmovConversion.cpp
index e31a7949f0be3868b332fb67ae1111ac6e1ad5d3..63ea62fcc628d54b7043bf724a493792d7898c40 100644 (file)
--- a/lib/Target/X86/X86CmovConversion.cpp
+++ b/lib/Target/X86/X86CmovConversion.cpp
@@ -53,13 +53,17 @@
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
-#define DEBUG_TYPE "x86-cmov-converter"
+#define DEBUG_TYPE "x86-cmov-conversion"
 
 STATISTIC(NumOfSkippedCmovGroups, "Number of unsupported CMOV-groups");
 STATISTIC(NumOfCmovGroupCandidate, "Number of CMOV-group candidates");
 STATISTIC(NumOfLoopCandidate, "Number of CMOV-conversion profitable loops");
 STATISTIC(NumOfOptimizedCmovGroups, "Number of optimized CMOV-groups");
 
+namespace llvm {
+  void initializeX86CmovConverterPassPass(PassRegistry &);
+}
+
 namespace {
 // This internal switch can be used to turn off the cmov/branch optimization.
 static cl::opt<bool>
@@ -80,17 +84,20 @@ static cl::opt<bool> ForceMemOperand(
 /// Converts X86 cmov instructions into branches when profitable.
 class X86CmovConverterPass : public MachineFunctionPass {
 public:
-  X86CmovConverterPass() : MachineFunctionPass(ID) {}
+  X86CmovConverterPass() : MachineFunctionPass(ID) {
+    initializeX86CmovConverterPassPass(*PassRegistry::getPassRegistry());
+  }
   ~X86CmovConverterPass() {}
 
   StringRef getPassName() const override { return "X86 cmov Conversion"; }
   bool runOnMachineFunction(MachineFunction &MF) override;
   void getAnalysisUsage(AnalysisUsage &AU) const override;
 
-private:
   /// Pass identification, replacement for typeid.
   static char ID;
 
+private:
+
   MachineRegisterInfo *MRI;
   const TargetInstrInfo *TII;
   const TargetRegisterInfo *TRI;
@@ -125,8 +132,6 @@ private:
   void convertCmovInstsToBranches(SmallVectorImpl<MachineInstr *> &Group) const;
 };
 
-char X86CmovConverterPass::ID = 0;
-
 void X86CmovConverterPass::getAnalysisUsage(AnalysisUsage &AU) const {
   MachineFunctionPass::getAnalysisUsage(AU);
   AU.addRequired<MachineLoopInfo>();
@@ -797,6 +802,14 @@ void X86CmovConverterPass::convertCmovInstsToBranches(
 
 } // End anonymous namespace.
 
+char X86CmovConverterPass::ID = 0;
+
+INITIALIZE_PASS_BEGIN(X86CmovConverterPass, DEBUG_TYPE, "X86 cmov Conversion",
+                      false, false)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_END(X86CmovConverterPass, DEBUG_TYPE, "X86 cmov Conversion",
+                    false, false)
+
 FunctionPass *llvm::createX86CmovConverterPass() {
   return new X86CmovConverterPass();
 }

diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index f071d229d8964edd345166aed04a0c4c1bf05139..51ae377986d95c4a17de8a118dc3ee9f68f6ad27 100644 (file)
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -58,6 +58,7 @@ namespace llvm {
 
 void initializeWinEHStatePassPass(PassRegistry &);
 void initializeFixupLEAPassPass(PassRegistry &);
+void initializeX86CmovConverterPassPass(PassRegistry &);
 void initializeX86ExecutionDepsFixPass(PassRegistry &);
 
 } // end namespace llvm
@@ -73,6 +74,7 @@ extern "C" void LLVMInitializeX86Target() {
   initializeFixupBWInstPassPass(PR);
   initializeEvexToVexInstPassPass(PR);
   initializeFixupLEAPassPass(PR);
+  initializeX86CmovConverterPassPass(PR);
   initializeX86ExecutionDepsFixPass(PR);
 }