/*------------ new transaction starts here ------------------*/
//ToDo: This is a stupidly simple low-cs-first priority scheme. Make this configurable somehow. - JD
+ //Disable interrupt before checking to avoid concurrency issue.
+ esp_intr_disable(host->intr);
+
for (i=0; i<NO_CS; i++) {
if (host->device[i]) {
r=xQueueReceiveFromISR(host->device[i]->trans_queue, &host->cur_trans_buf, &do_yield);
}
}
if (i==NO_CS) {
- //No packet waiting. Disable interrupt.
- esp_intr_disable(host->intr);
#ifdef CONFIG_PM_ENABLE
//Release APB frequency lock
esp_pm_lock_release(host->pm_lock);
#endif
} else {
+ //enable the interrupt again if there is packet to send
+ esp_intr_enable(host->intr);
+
host->hw->slave.trans_done=0; //clear int bit
//We have a transaction. Send it.
spi_device_t *dev=host->device[i];
}
}
+ //Disable interrupt before checking to avoid concurrency issue.
+ esp_intr_disable(host->intr);
//Grab next transaction
r = xQueueReceiveFromISR(host->trans_queue, &trans, &do_yield);
- if (!r) {
- //No packet waiting. Disable interrupt.
- esp_intr_disable(host->intr);
- } else {
+ if (r) {
+ //enable the interrupt again if there is packet to send
+ esp_intr_enable(host->intr);
+
//We have a transaction. Send it.
host->hw->slave.trans_done = 0; //clear int bit
host->cur_trans = trans;