Re-order mode search in rd.

Mode search order in rd loop changed to better reflect
observed hit counts.

Also some adjustment of the baseline mode rd thresholds
to reflect the order change and observed frequencies.

Change-Id: I47a131cc83e11551df8add6d6d8d413d78d3a63c

diff --git a/vp9/encoder/vp9_onyx_if.c b/vp9/encoder/vp9_onyx_if.c
index 3885e3678c04ce17177cf651a6951d5626c80ab5..88d9688cafbfb14c080816d209332c58490c5f9b 100644 (file)
--- a/vp9/encoder/vp9_onyx_if.c
+++ b/vp9/encoder/vp9_onyx_if.c
@@ -572,60 +572,57 @@ static void set_rd_speed_thresholds(VP9_COMP *cpi, int mode, int speed) {
   for (i = 0; i < MAX_MODES; ++i)
     sf->thresh_mult[i] = mode == 0 ? -500 : 0;
 
-  sf->thresh_mult[THR_ZEROMV] = 0;
-  sf->thresh_mult[THR_ZEROG] = 0;
-  sf->thresh_mult[THR_ZEROA] = 0;
-
   sf->thresh_mult[THR_NEARESTMV] = 0;
   sf->thresh_mult[THR_NEARESTG] = 0;
   sf->thresh_mult[THR_NEARESTA] = 0;
 
+  sf->thresh_mult[THR_NEWMV] += speed_multiplier * 1000;
+  sf->thresh_mult[THR_COMP_NEARESTLA] += speed_multiplier * 1000;
   sf->thresh_mult[THR_NEARMV] += speed_multiplier * 1000;
-  sf->thresh_mult[THR_NEARG] += speed_multiplier * 1000;
-  sf->thresh_mult[THR_NEARA] += speed_multiplier * 1000;
-
-  sf->thresh_mult[THR_DC       ] = 0;
-  sf->thresh_mult[THR_TM] += speed_multiplier * 1000;
-  sf->thresh_mult[THR_V_PRED   ] += speed_multiplier * 1000;
-  sf->thresh_mult[THR_H_PRED   ] += speed_multiplier * 1000;
-  sf->thresh_mult[THR_D45_PRED ] += speed_multiplier * 1500;
-  sf->thresh_mult[THR_D135_PRED] += speed_multiplier * 1500;
-  sf->thresh_mult[THR_D117_PRED] += speed_multiplier * 1500;
-  sf->thresh_mult[THR_D153_PRED] += speed_multiplier * 1500;
-  sf->thresh_mult[THR_D27_PRED ] += speed_multiplier * 1500;
-  sf->thresh_mult[THR_D63_PRED ] += speed_multiplier * 1500;
-
-  sf->thresh_mult[THR_B_PRED   ] += speed_multiplier * 2500;
+  sf->thresh_mult[THR_COMP_NEARESTGA] += speed_multiplier * 1000;
 
-  sf->thresh_mult[THR_NEWMV    ] += speed_multiplier * 1000;
-  sf->thresh_mult[THR_NEWG     ] += speed_multiplier * 1000;
-  sf->thresh_mult[THR_NEWA     ] += speed_multiplier * 1000;
+  sf->thresh_mult[THR_DC] += speed_multiplier * 1000;
 
-  sf->thresh_mult[THR_SPLITMV  ] += speed_multiplier * 2500;
-  sf->thresh_mult[THR_SPLITG   ] += speed_multiplier * 2500;
-  sf->thresh_mult[THR_SPLITA   ] += speed_multiplier * 2500;
-
-  sf->thresh_mult[THR_COMP_ZEROLA] += speed_multiplier * 1500;
-  sf->thresh_mult[THR_COMP_ZEROGA] += speed_multiplier * 1500;
+  sf->thresh_mult[THR_NEWG] += speed_multiplier * 1000;
+  sf->thresh_mult[THR_NEWA] += speed_multiplier * 1000;
+  sf->thresh_mult[THR_NEARA] += speed_multiplier * 1000;
 
-  sf->thresh_mult[THR_COMP_NEARESTLA] += speed_multiplier * 1500;
-  sf->thresh_mult[THR_COMP_NEARESTGA] += speed_multiplier * 1500;
+  sf->thresh_mult[THR_TM] += speed_multiplier * 1000;
 
   sf->thresh_mult[THR_COMP_NEARLA] += speed_multiplier * 1500;
+  sf->thresh_mult[THR_COMP_NEWLA] += speed_multiplier * 2000;
+  sf->thresh_mult[THR_NEARG] += speed_multiplier * 1000;
   sf->thresh_mult[THR_COMP_NEARGA] += speed_multiplier * 1500;
-
-  sf->thresh_mult[THR_COMP_NEWLA    ] += speed_multiplier * 2000;
-  sf->thresh_mult[THR_COMP_NEWGA    ] += speed_multiplier * 2000;
-
-  sf->thresh_mult[THR_COMP_SPLITLA  ] += speed_multiplier * 4500;
-  sf->thresh_mult[THR_COMP_SPLITGA  ] += speed_multiplier * 4500;
+  sf->thresh_mult[THR_COMP_NEWGA] += speed_multiplier * 2000;
+
+  sf->thresh_mult[THR_SPLITMV] += speed_multiplier * 2500;
+  sf->thresh_mult[THR_SPLITG] += speed_multiplier * 2500;
+  sf->thresh_mult[THR_SPLITA] += speed_multiplier * 2500;
+  sf->thresh_mult[THR_COMP_SPLITLA] += speed_multiplier * 4500;
+  sf->thresh_mult[THR_COMP_SPLITGA] += speed_multiplier * 4500;
+
+  sf->thresh_mult[THR_ZEROMV] += speed_multiplier * 2000;
+  sf->thresh_mult[THR_ZEROG] += speed_multiplier * 2000;
+  sf->thresh_mult[THR_ZEROA] += speed_multiplier * 2000;
+  sf->thresh_mult[THR_COMP_ZEROLA] += speed_multiplier * 2500;
+  sf->thresh_mult[THR_COMP_ZEROGA] += speed_multiplier * 2500;
+
+  sf->thresh_mult[THR_B_PRED] += speed_multiplier * 2500;
+  sf->thresh_mult[THR_H_PRED] += speed_multiplier * 2000;
+  sf->thresh_mult[THR_V_PRED] += speed_multiplier * 2000;
+  sf->thresh_mult[THR_D45_PRED ] += speed_multiplier * 2500;
+  sf->thresh_mult[THR_D135_PRED] += speed_multiplier * 2500;
+  sf->thresh_mult[THR_D117_PRED] += speed_multiplier * 2500;
+  sf->thresh_mult[THR_D153_PRED] += speed_multiplier * 2500;
+  sf->thresh_mult[THR_D27_PRED] += speed_multiplier * 2500;
+  sf->thresh_mult[THR_D63_PRED] += speed_multiplier * 2500;
 
   if (cpi->sf.skip_lots_of_modes) {
     for (i = 0; i < MAX_MODES; ++i)
       sf->thresh_mult[i] = INT_MAX;
 
-    sf->thresh_mult[THR_DC] = 0;
-    sf->thresh_mult[THR_TM] = 0;
+    sf->thresh_mult[THR_DC] = 2000;
+    sf->thresh_mult[THR_TM] = 2000;
     sf->thresh_mult[THR_NEWMV] = 4000;
     sf->thresh_mult[THR_NEWG] = 4000;
     sf->thresh_mult[THR_NEWA] = 4000;

diff --git a/vp9/encoder/vp9_onyx_int.h b/vp9/encoder/vp9_onyx_int.h
index cb8748027660be22a56c8ed69c934d78be7626c0..00d8684edcb89e498e4707887f82dbca50e1b0cd 100644 (file)
--- a/vp9/encoder/vp9_onyx_int.h
+++ b/vp9/encoder/vp9_onyx_int.h
@@ -145,53 +145,48 @@ typedef struct {
 // const MODE_DEFINITION vp9_mode_order[MAX_MODES] used in the rd code.
 typedef enum {
   THR_NEARESTMV,
+  THR_NEARESTA,
+  THR_NEARESTG,
+  THR_NEWMV,
+  THR_COMP_NEARESTLA,
   THR_NEARMV,
+  THR_COMP_NEARESTGA,
 
-  THR_ZEROMV,
   THR_DC,
 
-  THR_ZEROG,
-  THR_NEARESTG,
-
-  THR_ZEROA,
-  THR_NEARESTA,
-
-  THR_NEARG,
+  THR_NEWG,
+  THR_NEWA,
   THR_NEARA,
 
-  THR_V_PRED,
-  THR_H_PRED,
-  THR_D45_PRED,
-  THR_D135_PRED,
-  THR_D117_PRED,
-  THR_D153_PRED,
-  THR_D27_PRED,
-  THR_D63_PRED,
   THR_TM,
 
-  THR_NEWMV,
-  THR_NEWG,
-  THR_NEWA,
+  THR_COMP_NEARLA,
+  THR_COMP_NEWLA,
+  THR_NEARG,
+  THR_COMP_NEARGA,
+  THR_COMP_NEWGA,
 
   THR_SPLITMV,
   THR_SPLITG,
   THR_SPLITA,
+  THR_COMP_SPLITLA,
+  THR_COMP_SPLITGA,
 
-  THR_B_PRED,
-
+  THR_ZEROMV,
+  THR_ZEROG,
+  THR_ZEROA,
   THR_COMP_ZEROLA,
-  THR_COMP_NEARESTLA,
-  THR_COMP_NEARLA,
-
   THR_COMP_ZEROGA,
-  THR_COMP_NEARESTGA,
-  THR_COMP_NEARGA,
 
-  THR_COMP_NEWLA,
-  THR_COMP_NEWGA,
-
-  THR_COMP_SPLITLA,
-  THR_COMP_SPLITGA,
+  THR_B_PRED,
+  THR_H_PRED,
+  THR_V_PRED,
+  THR_D135_PRED,
+  THR_D27_PRED,
+  THR_D153_PRED,
+  THR_D63_PRED,
+  THR_D117_PRED,
+  THR_D45_PRED,
 } THR_MODES;
 
 typedef enum {

diff --git a/vp9/encoder/vp9_rdopt.c b/vp9/encoder/vp9_rdopt.c
index 05d543270a85d2fa5089c86931bfeb16bb084c35..adffce9e6fc18403cc00f89f15082e3096a7d9ce 100644 (file)
--- a/vp9/encoder/vp9_rdopt.c
+++ b/vp9/encoder/vp9_rdopt.c
@@ -54,55 +54,48 @@ DECLARE_ALIGNED(16, extern const uint8_t,
 
 const MODE_DEFINITION vp9_mode_order[MAX_MODES] = {
   {NEARESTMV, LAST_FRAME,   NONE},
+  {NEARESTMV, ALTREF_FRAME, NONE},
+  {NEARESTMV, GOLDEN_FRAME, NONE},
+  {NEWMV,     LAST_FRAME,   NONE},
+  {NEARESTMV, LAST_FRAME,   ALTREF_FRAME},
   {NEARMV,    LAST_FRAME,   NONE},
+  {NEARESTMV, GOLDEN_FRAME, ALTREF_FRAME},
 
-  {ZEROMV,    LAST_FRAME,   NONE},
   {DC_PRED,   INTRA_FRAME,  NONE},
 
-  {ZEROMV,    GOLDEN_FRAME, NONE},
-  {NEARESTMV, GOLDEN_FRAME, NONE},
-
-  {ZEROMV,    ALTREF_FRAME, NONE},
-  {NEARESTMV, ALTREF_FRAME, NONE},
-
-  {NEARMV,    GOLDEN_FRAME, NONE},
+  {NEWMV,     GOLDEN_FRAME, NONE},
+  {NEWMV,     ALTREF_FRAME, NONE},
   {NEARMV,    ALTREF_FRAME, NONE},
 
-  {V_PRED,    INTRA_FRAME,  NONE},
-  {H_PRED,    INTRA_FRAME,  NONE},
-  {D45_PRED,  INTRA_FRAME,  NONE},
-  {D135_PRED, INTRA_FRAME,  NONE},
-  {D117_PRED, INTRA_FRAME,  NONE},
-  {D153_PRED, INTRA_FRAME,  NONE},
-  {D27_PRED,  INTRA_FRAME,  NONE},
-  {D63_PRED,  INTRA_FRAME,  NONE},
-
   {TM_PRED,   INTRA_FRAME,  NONE},
 
-  {NEWMV,     LAST_FRAME,   NONE},
-  {NEWMV,     GOLDEN_FRAME, NONE},
-  {NEWMV,     ALTREF_FRAME, NONE},
+  {NEARMV,    LAST_FRAME,   ALTREF_FRAME},
+  {NEWMV,     LAST_FRAME,   ALTREF_FRAME},
+  {NEARMV,    GOLDEN_FRAME, NONE},
+  {NEARMV,    GOLDEN_FRAME, ALTREF_FRAME},
+  {NEWMV,     GOLDEN_FRAME, ALTREF_FRAME},
 
   {SPLITMV,   LAST_FRAME,   NONE},
   {SPLITMV,   GOLDEN_FRAME, NONE},
   {SPLITMV,   ALTREF_FRAME, NONE},
+  {SPLITMV,   LAST_FRAME,   ALTREF_FRAME},
+  {SPLITMV,   GOLDEN_FRAME, ALTREF_FRAME},
 
-  {I4X4_PRED, INTRA_FRAME,  NONE},
-
-  /* compound prediction modes */
+  {ZEROMV,    LAST_FRAME,   NONE},
+  {ZEROMV,    GOLDEN_FRAME, NONE},
+  {ZEROMV,    ALTREF_FRAME, NONE},
   {ZEROMV,    LAST_FRAME,   ALTREF_FRAME},
-  {NEARESTMV, LAST_FRAME,   ALTREF_FRAME},
-  {NEARMV,    LAST_FRAME,   ALTREF_FRAME},
-
   {ZEROMV,    GOLDEN_FRAME, ALTREF_FRAME},
-  {NEARESTMV, GOLDEN_FRAME, ALTREF_FRAME},
-  {NEARMV,    GOLDEN_FRAME, ALTREF_FRAME},
 
-  {NEWMV,     LAST_FRAME,   ALTREF_FRAME},
-  {NEWMV,     GOLDEN_FRAME, ALTREF_FRAME},
-
-  {SPLITMV,   LAST_FRAME,   ALTREF_FRAME},
-  {SPLITMV,   GOLDEN_FRAME, ALTREF_FRAME},
+  {I4X4_PRED, INTRA_FRAME,  NONE},
+  {H_PRED,    INTRA_FRAME,  NONE},
+  {V_PRED,    INTRA_FRAME,  NONE},
+  {D135_PRED, INTRA_FRAME,  NONE},
+  {D27_PRED,  INTRA_FRAME,  NONE},
+  {D153_PRED, INTRA_FRAME,  NONE},
+  {D63_PRED,  INTRA_FRAME,  NONE},
+  {D117_PRED, INTRA_FRAME,  NONE},
+  {D45_PRED,  INTRA_FRAME,  NONE},
 };
 
 // The baseline rd thresholds for breaking out of the rd loop for