[AArch64] Simplify AES*Tied pseudo expansion (NFC).

Summary:
Suggested by @t.p.northover in https://bugs.llvm.org/show_bug.cgi?id=34015.

Reviewers: javed.absar, t.p.northover, rengolin

Reviewed By: t.p.northover

Subscribers: aemerson, kristof.beyls, llvm-commits, t.p.northover

Differential Revision: https://reviews.llvm.org/D36223

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309821 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp b/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
index fdb90f40aa82496777ff511dd664d310320e8d7a..d4d291066cafc8a9fbf7af950a3c87f0b92ce3f2 100644 (file)
--- a/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+++ b/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
@@ -967,17 +967,10 @@ bool AArch64ExpandPseudo::expandMI(MachineBasicBlock &MBB,
     return expandCMP_SWAP_128(MBB, MBBI, NextMBBI);
 
   case AArch64::AESMCrrTied:
-  case AArch64::AESIMCrrTied: {
-    MachineInstrBuilder MIB =
-    BuildMI(MBB, MBBI, MI.getDebugLoc(),
-            TII->get(Opcode == AArch64::AESMCrrTied ? AArch64::AESMCrr :
-                                                      AArch64::AESIMCrr))
-      .add(MI.getOperand(0))
-      .add(MI.getOperand(1));
-    transferImpOps(MI, MIB, MIB);
-    MI.eraseFromParent();
+  case AArch64::AESIMCrrTied:
+    MI.setDesc(TII->get(Opcode == AArch64::AESMCrrTied ? AArch64::AESMCrr :
+                                                         AArch64::AESIMCrr));
     return true;
-   }
   }
   return false;
 }