component/esp32 : remove pm gpio dbg

diff --git a/components/esp32/phy_init.c b/components/esp32/phy_init.c
index 625040fae70fa8442883fe83276bfe52bea05ad3..6d0b1dd0dc68eb15c8d79c213b485e1e9e2970aa 100644 (file)
--- a/components/esp32/phy_init.c
+++ b/components/esp32/phy_init.c
@@ -188,7 +188,6 @@ esp_err_t esp_phy_rf_deinit(phy_rf_module_t module)
         }
 
         if (s_is_phy_rf_en == false) {
-            gpio_set_level(15, 0); //G1, 15
             // Disable PHY and RF.
             phy_close_rf();
             // Disable WiFi/BT common peripheral clock. Do not disable clock for hardware RNG