{OPT_RM|OPS_32|OPA_EA, 0, 0} },
{ CPU_Hammer|CPU_64, MOD_GasSufQ, 0, 64, 0, 1, {0xFF, 0, 0}, 6, 1,
{OPT_RM|OPS_64|OPA_EA, 0, 0} },
- { CPU_Any, MOD_GasSufQ, 0, 64, 0, 1, {0x6A, 0, 0}, 0, 1,
+ { CPU_Any, MOD_GasIllegal, 0, 64, 0, 1, {0x6A, 0, 0}, 0, 1,
{OPT_Imm|OPS_8|OPA_SImm, 0, 0} },
- { CPU_Any, MOD_GasSufW, 16, 64, 0, 1, {0x68, 0, 0}, 0, 1,
+ { CPU_Any, MOD_GasIllegal, 16, 64, 0, 1, {0x68, 0, 0}, 0, 1,
{OPT_Imm|OPS_16|OPA_Imm, 0, 0} },
- { CPU_386|CPU_Not64, MOD_GasSufL, 32, 0, 0, 1, {0x68, 0, 0}, 0, 1,
+ { CPU_386|CPU_Not64, MOD_GasIllegal, 32, 0, 0, 1, {0x68, 0, 0}, 0, 1,
{OPT_Imm|OPS_32|OPA_Imm, 0, 0} },
- { CPU_Hammer|CPU_64, MOD_GasSufQ, 64, 64, 0, 1, {0x68, 0, 0}, 0, 1,
+ { CPU_Hammer|CPU_64, MOD_GasIllegal, 64, 64, 0, 1, {0x68, 0, 0}, 0, 1,
{OPT_Imm|OPS_32|OPA_SImm, 0, 0} },
+ { CPU_Any, MOD_GasOnly|MOD_GasSufB, 0, 64, 0, 1, {0x6A, 0, 0}, 0, 1,
+ {OPT_Imm|OPS_8|OPS_Relaxed|OPA_SImm, 0, 0} },
+ { CPU_Any, MOD_GasOnly|MOD_GasSufW, 16, 64, 0, 1, {0x68, 0, 0}, 0, 1,
+ {OPT_Imm|OPS_16|OPS_Relaxed|OPA_Imm, 0, 0} },
+ { CPU_386|CPU_Not64, MOD_GasOnly|MOD_GasSufL, 32, 0, 0, 1, {0x68, 0, 0},
+ 0, 1, {OPT_Imm|OPS_32|OPS_Relaxed|OPA_Imm, 0, 0} },
+ { CPU_Hammer|CPU_64, MOD_GasOnly|MOD_GasSufQ, 64, 64, 0, 1, {0x68, 0, 0},
+ 0, 1, {OPT_Imm|OPS_32|OPS_Relaxed|OPA_SImm, 0, 0} },
{ CPU_Not64, 0, 0, 0, 0, 1, {0x0E, 0, 0}, 0, 1,
{OPT_CS|OPS_Any|OPA_None, 0, 0} },
{ CPU_Not64, MOD_GasSufW, 16, 0, 0, 1, {0x0E, 0, 0}, 0, 1,
/* Arithmetic - inc/dec */
static const x86_insn_info incdec_insn[] = {
- { CPU_Any, MOD_Gap0|MOD_SpAdd, 0, 0, 0, 1, {0xFE, 0, 0}, 0, 1,
+ { CPU_Any, MOD_Gap0|MOD_SpAdd|MOD_GasSufB, 0, 0, 0, 1, {0xFE, 0, 0}, 0, 1,
{OPT_RM|OPS_8|OPA_EA, 0, 0} },
- { CPU_Not64, MOD_Op0Add, 16, 0, 0, 1, {0, 0, 0}, 0, 1,
+ { CPU_Not64, MOD_Op0Add|MOD_GasSufW, 16, 0, 0, 1, {0, 0, 0}, 0, 1,
{OPT_Reg|OPS_16|OPA_Op0Add, 0, 0} },
- { CPU_Any, MOD_Gap0|MOD_SpAdd, 16, 0, 0, 1, {0xFF, 0, 0}, 0, 1,
- {OPT_RM|OPS_16|OPA_EA, 0, 0} },
- { CPU_386|CPU_Not64, MOD_Op0Add, 32, 0, 0, 1, {0, 0, 0}, 0, 1,
+ { CPU_Any, MOD_Gap0|MOD_SpAdd|MOD_GasSufW, 16, 0, 0, 1, {0xFF, 0, 0}, 0,
+ 1, {OPT_RM|OPS_16|OPA_EA, 0, 0} },
+ { CPU_386|CPU_Not64, MOD_Op0Add|MOD_GasSufL, 32, 0, 0, 1, {0, 0, 0}, 0, 1,
{OPT_Reg|OPS_32|OPA_Op0Add, 0, 0} },
- { CPU_386, MOD_Gap0|MOD_SpAdd, 32, 0, 0, 1, {0xFF, 0, 0}, 0, 1,
+ { CPU_386, MOD_Gap0|MOD_SpAdd|MOD_GasSufL, 32, 0, 0, 1, {0xFF, 0, 0}, 0, 1,
{OPT_RM|OPS_32|OPA_EA, 0, 0} },
- { CPU_Hammer|CPU_64, MOD_Gap0|MOD_SpAdd, 64, 0, 0, 1, {0xFF, 0, 0}, 0, 1,
- {OPT_RM|OPS_64|OPA_EA, 0, 0} },
+ { CPU_Hammer|CPU_64, MOD_Gap0|MOD_SpAdd|MOD_GasSufQ, 64, 0, 0, 1,
+ {0xFF, 0, 0}, 0, 1, {OPT_RM|OPS_64|OPA_EA, 0, 0} },
};
/* Arithmetic - mul/neg/not F6 opcodes */