void report_context(const VNInfo &VNI) const;
void report_context(SlotIndex Pos) const;
void report_context_liverange(const LiveRange &LR) const;
- void report_context_regunit(unsigned RegUnit) const;
void report_context_lanemask(LaneBitmask LaneMask) const;
void report_context_vreg(unsigned VReg) const;
void report_context_vreg_regunit(unsigned VRegOrRegUnit) const;
errs() << "- liverange: " << LR << '\n';
}
-void MachineVerifier::report_context_regunit(unsigned RegUnit) const {
- errs() << "- regunit: " << PrintRegUnit(RegUnit, TRI) << '\n';
-}
-
void MachineVerifier::report_context_vreg(unsigned VReg) const {
errs() << "- v. register: " << PrintReg(VReg, TRI) << '\n';
}
};
class ELFObjectWriter : public MCObjectWriter {
- static bool isFixupKindPCRel(const MCAssembler &Asm, unsigned Kind);
static uint64_t SymbolValue(const MCSymbol &Sym, const MCAsmLayout &Layout);
static bool isInSymtab(const MCAsmLayout &Layout, const MCSymbolELF &Symbol,
bool Used, bool Renamed);
++NumWritten;
}
-bool ELFObjectWriter::isFixupKindPCRel(const MCAssembler &Asm, unsigned Kind) {
- const MCFixupKindInfo &FKI =
- Asm.getBackend().getFixupKindInfo((MCFixupKind) Kind);
-
- return FKI.Flags & MCFixupKindInfo::FKF_IsPCRel;
-}
-
ELFObjectWriter::~ELFObjectWriter()
{}
relocations Relocations;
COFFSection(StringRef name);
- static size_t size();
};
class WinCOFFObjectWriter : public MCObjectWriter {
memset(&Header, 0, sizeof(Header));
}
-size_t COFFSection::size() { return COFF::SectionSize; }
-
//------------------------------------------------------------------------------
// WinCOFFObjectWriter class implementation
static bool isFlatStore(const MemSDNode *N);
static bool isPrivateStore(const StoreSDNode *N);
static bool isLocalStore(const StoreSDNode *N);
- static bool isRegionStore(const StoreSDNode *N);
bool isCPLoad(const LoadSDNode *N) const;
bool isConstantLoad(const MemSDNode *N, int cbID) const;
return checkType(N->getMemOperand()->getValue(), AMDGPUAS::FLAT_ADDRESS);
}
-bool AMDGPUDAGToDAGISel::isRegionStore(const StoreSDNode *N) {
- return checkType(N->getMemOperand()->getValue(), AMDGPUAS::REGION_ADDRESS);
-}
-
bool AMDGPUDAGToDAGISel::isConstantLoad(const MemSDNode *N, int CbId) const {
if (!N->readMem())
return false;
void cvtMubuf(MCInst &Inst, const OperandVector &Operands) { cvtMubufImpl(Inst, Operands, false, false); }
void cvtMubufAtomic(MCInst &Inst, const OperandVector &Operands) { cvtMubufImpl(Inst, Operands, true, false); }
void cvtMubufAtomicReturn(MCInst &Inst, const OperandVector &Operands) { cvtMubufImpl(Inst, Operands, true, true); }
- AMDGPUOperand::Ptr defaultMubufOffset() const;
AMDGPUOperand::Ptr defaultGLC() const;
AMDGPUOperand::Ptr defaultSLC() const;
AMDGPUOperand::Ptr defaultTFE() const;
return isImmTy(ImmTyOffset) && isUInt<12>(getImm());
}
-AMDGPUOperand::Ptr AMDGPUAsmParser::defaultMubufOffset() const {
- return AMDGPUOperand::CreateImm(0, SMLoc(), AMDGPUOperand::ImmTyOffset);
-}
-
AMDGPUOperand::Ptr AMDGPUAsmParser::defaultGLC() const {
return AMDGPUOperand::CreateImm(0, SMLoc(), AMDGPUOperand::ImmTyGLC);
}
MachineBasicBlock::iterator findMatchingDSInst(MachineBasicBlock::iterator I,
unsigned EltSize);
- void updateRegDefsUses(unsigned SrcReg,
- unsigned DstReg,
- unsigned SubIdx);
-
MachineBasicBlock::iterator mergeRead2Pair(
MachineBasicBlock::iterator I,
MachineBasicBlock::iterator Paired,
return E;
}
-void SILoadStoreOptimizer::updateRegDefsUses(unsigned SrcReg,
- unsigned DstReg,
- unsigned SubIdx) {
- for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(SrcReg),
- E = MRI->reg_end(); I != E; ) {
- MachineOperand &O = *I;
- ++I;
- O.substVirtReg(DstReg, SubIdx, *TRI);
- }
-}
-
MachineBasicBlock::iterator SILoadStoreOptimizer::mergeRead2Pair(
MachineBasicBlock::iterator I,
MachineBasicBlock::iterator Paired,
bool expandAbs(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
const MCSubtargetInfo *STI);
- void createCpRestoreMemOp(bool IsLoad, int StackOffset, SMLoc IDLoc,
- MCStreamer &Out, const MCSubtargetInfo *STI);
-
bool reportParseError(Twine ErrorMsg);
bool reportParseError(SMLoc Loc, Twine ErrorMsg);
unsigned getReg(int RC, int RegNo);
- unsigned getGPR(int RegNo);
-
/// Returns the internal register number for the current AT. Also checks if
/// the current AT is unavailable (set to $0) and gives an error if it is.
/// This should be used in pseudo-instruction expansions which need AT.
return false;
}
-void MipsAsmParser::createCpRestoreMemOp(bool IsLoad, int StackOffset,
- SMLoc IDLoc, MCStreamer &Out,
- const MCSubtargetInfo *STI) {
- MipsTargetStreamer &TOut = getTargetStreamer();
-
- if (IsLoad) {
- TOut.emitLoadWithImmOffset(Mips::LW, Mips::GP, Mips::SP, StackOffset,
- Mips::GP, IDLoc, STI);
- return;
- }
-
- TOut.emitStoreWithImmOffset(Mips::SW, Mips::GP, Mips::SP, StackOffset,
- [&]() { return getATReg(IDLoc); }, IDLoc, STI);
-}
-
unsigned MipsAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
switch (Inst.getOpcode()) {
// As described by the Mips32r2 spec, the registers Rd and Rs for
return *(getContext().getRegisterInfo()->getRegClass(RC).begin() + RegNo);
}
-unsigned MipsAsmParser::getGPR(int RegNo) {
- return getReg(isGP64bit() ? Mips::GPR64RegClassID : Mips::GPR32RegClassID,
- RegNo);
-}
-
int MipsAsmParser::matchRegisterByNumber(unsigned RegNum, unsigned RegClass) {
if (RegNum >
getContext().getRegisterInfo()->getRegClass(RegClass).getNumRegs() - 1)
unsigned &NumBytes,
bool IsVarArg);
bool finishCall(MVT RetVT, CallLoweringInfo &CLI, unsigned &NumBytes);
- CCAssignFn *usePPC32CCs(unsigned Flag);
private:
#include "PPCGenFastISel.inc"
#include "PPCGenCallingConv.inc"
-// Function whose sole purpose is to kill compiler warnings
-// stemming from unused functions included from PPCGenCallingConv.inc.
-CCAssignFn *PPCFastISel::usePPC32CCs(unsigned Flag) {
- if (Flag == 1)
- return CC_PPC32_SVR4;
- else if (Flag == 2)
- return CC_PPC32_SVR4_ByVal;
- else if (Flag == 3)
- return CC_PPC32_SVR4_VarArg;
- else
- return RetCC_PPC;
-}
-
static Optional<PPC::Predicate> getComparePred(CmpInst::Predicate Pred) {
switch (Pred) {
// These are not representable with any single compare.
bool adjustLoopLinks();
void adjustLoopPreheaders();
void adjustOuterLoopPreheader();
- void adjustInnerLoopPreheader();
bool adjustLoopBranches();
void updateIncomingBlock(BasicBlock *CurrBlock, BasicBlock *OldPred,
BasicBlock *NewPred);
moveBBContents(OuterLoopPreHeader, InnerPreHeader->getTerminator());
}
-void LoopInterchangeTransform::adjustInnerLoopPreheader() {
- BasicBlock *InnerLoopPreHeader = InnerLoop->getLoopPreheader();
- BasicBlock *OuterHeader = OuterLoop->getHeader();
-
- moveBBContents(InnerLoopPreHeader, OuterHeader->getTerminator());
-}
-
void LoopInterchangeTransform::updateIncomingBlock(BasicBlock *CurrBlock,
BasicBlock *OldPred,
BasicBlock *NewPred) {
uint32_t RelocOffset, uint32_t Offset,
StringRef *RelocSym = nullptr);
- void printRelocatedField(StringRef Label, const coff_section *Sec,
- StringRef SectionContents, const ulittle32_t *Field,
- StringRef *RelocSym = nullptr);
-
void printBinaryBlockWithRelocs(StringRef Label, const SectionRef &Sec,
StringRef SectionContents, StringRef Block);
W.printHex(Label, RelocOffset);
}
-void COFFDumper::printRelocatedField(StringRef Label, const coff_section *Sec,
- StringRef SectionContents,
- const ulittle32_t *Field,
- StringRef *RelocSym) {
- StringRef SymStorage;
- StringRef &Symbol = RelocSym ? *RelocSym : SymStorage;
- if (!resolveSymbolName(Sec, SectionContents, Field, Symbol))
- W.printSymbolOffset(Label, Symbol, *Field);
- else
- W.printHex(Label, *Field);
-}
-
void COFFDumper::printBinaryBlockWithRelocs(StringRef Label,
const SectionRef &Sec,
StringRef SectionContents,